From patchwork Mon Mar 10 11:10:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 14009617 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F30B728EA for ; Mon, 10 Mar 2025 11:10:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605053; cv=none; b=SROw7AI8EFsNbfp17NTuxrGD+k6IvYePFQlLJV+qRqgwmSthKOki4YtqJrAvZpD7xvYyqoSAQv+gAhB74NXaDf2AflsPPJJ7a1GmVrA71eVuJguxXW0Nvgk4a7U82SUZUDY2XWLDjXpBqlIQGKkk+kTr15rrYAWRcgDS6uyl57I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605053; c=relaxed/simple; bh=UK/dCYky07X9+cp+PfUtaAqR6aGqK+DrT/lV5+WgypE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mqZYpBjxF5870QsQktlN6j5xR3Xt9FVoNhLy+z4n5YdFl2Js+AeLFKfO5B+WTqBsOvyZRFNzvU8cwhGZS071BzhR81i+anXRJDhTWBKtCxF0he95n9653hEARi9b+jNncAcycIHM/ka6kXS9x7hIchG2ybzTfsIto+mCyCm5tPs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bghbTDUv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bghbTDUv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BDBADC4CEEE; Mon, 10 Mar 2025 11:10:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741605052; bh=UK/dCYky07X9+cp+PfUtaAqR6aGqK+DrT/lV5+WgypE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bghbTDUvdBTMC1/YnO4xPbBG1KwmHpj0boowSM1yTjG37U5KRq/78cxrwZzci/CvV 4A977dBOsrB9q9ebHwPxeqEg8VLjKvPVQep6RT9Fn1J76EIsW73N3iyZ0GXir7m7RS XYYoHQ0eUQIRmBlapH5+pXEPzvRQxLIi3KEUAqJt3DK3ne9Bglt9Sco2Hib48EEWkL 97CbXtYw7HpXun9Xc70y/BzoXptJq/5pBpbi5Hg86xdWywSquymGPajy85gatanVds WW7EtYrwDkff8KSNu8WhwR8jN0gId+u3r8sTOCpj4qxSeD0L3bgH4kme7wfyJTLHAu v2SsdnCSvMRtg== From: Niklas Cassel To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org Cc: linux-pci@vger.kernel.org, Damien Le Moal , Kunihiko Hayashi , Niklas Cassel Subject: [PATCH 1/7] PCI: endpoint: pcitest: Add IRQ_TYPE_* defines to UAPI header Date: Mon, 10 Mar 2025 12:10:18 +0100 Message-ID: <20250310111016.859445-10-cassel@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111016.859445-9-cassel@kernel.org> References: <20250310111016.859445-9-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1002; i=cassel@kernel.org; h=from:subject; bh=UK/dCYky07X9+cp+PfUtaAqR6aGqK+DrT/lV5+WgypE=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLPnZjHvGSlv3d0ueSUX0srNlx+fLDhfuOs69eUJls5X PkroXggpaOUhUGMi0FWTJHF94fL/uJu9ynHFe/YwMxhZQIZwsDFKQATCehj+J/is+CqmZQg39+0 /htng7M7rOwPfPNvrSxdlb+R0YPlejsjw45HHvvlRRbvepQaXpbyXjmJq/P7YzupO+vW9hzjcWr u5QMA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA These IRQ_TYPE_* defines are used by both drivers/misc/pci_endpoint_test.c and tools/testing/selftests/pci_endpoint/pci_endpoint_test.c. Considering that both the misc driver and the selftest already includes the pcitest.h UAPI header, it makes sense for these IRQ_TYPE_* defines to be located in the pcitest.h UAPI header. Signed-off-by: Niklas Cassel --- include/uapi/linux/pcitest.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/uapi/linux/pcitest.h b/include/uapi/linux/pcitest.h index acd261f49866..304bf9be0f9a 100644 --- a/include/uapi/linux/pcitest.h +++ b/include/uapi/linux/pcitest.h @@ -23,6 +23,11 @@ #define PCITEST_BARS _IO('P', 0xa) #define PCITEST_CLEAR_IRQ _IO('P', 0x10) +#define PCITEST_IRQ_TYPE_UNDEFINED -1 +#define PCITEST_IRQ_TYPE_INTX 0 +#define PCITEST_IRQ_TYPE_MSI 1 +#define PCITEST_IRQ_TYPE_MSIX 2 + #define PCITEST_FLAGS_USE_DMA 0x00000001 struct pci_endpoint_test_xfer_param { From patchwork Mon Mar 10 11:10:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 14009618 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E0F728EA for ; Mon, 10 Mar 2025 11:10:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605055; cv=none; b=t5/Nx4g1nksZiONNOX6FW8hVFXX6Me1JL1qhPplrigHFa2+jnPZ05thUIsMqTL0lbAthdbKyzl24HpCdT/MietmouqY+7QxIQnhb0TkNwCyJsASRwVHGAF+EoUmPBMYrdSGpwdsRjA/T4PFi8OnKfazPJcb36Wvxf+y4VYu7z2Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605055; c=relaxed/simple; bh=QxYKR2lxbSzV8kEj3MZitH3JX2jgAUVMNNRanilkk4c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f1rF43DeOHitfqJeVqlI3CakAgsBsPQexx9uzyAmVc/LOLMnq9GpEf5bFSDWknt+TsYTloHAnk3GncQHwXK7TKkuyw6YDGCZjIt+6htfdUpoDCtJ/Qn1PUu2XVPYuoiKienUN/HTwkX+rlPKNPlPgonug81Cv1NcFm5yogS0xx0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HFDr5iCB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HFDr5iCB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E87FCC4AF09; Mon, 10 Mar 2025 11:10:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741605054; bh=QxYKR2lxbSzV8kEj3MZitH3JX2jgAUVMNNRanilkk4c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HFDr5iCBQflVlE263e6/6geAcxbku67r/TwyZsZZcwqNCY1Am8yTSjDsfjjp+BpPS VGln///qNfJNNc7hC7npPmTLnUY67l52XYMI0Te0PXxOcInd2klmeupK7cLw8dIYZR PJo6+I0ZNAlkDbyKZ6GfTmcJeErMGGGlPPi79hYkruSAc0oJeEHd5Mf2vIOdwHSCr2 diEdgTZcQ56U8MtU7GkHx3boRCW+2+srj1HReOczAABi+6KVuvOk3TnNqbWAADO/WY FsedxlOjqSXHp3EbezEnBMlE0TwMjYih7w5/Ckptftl7c5s6ai0E/YHAT6iGpPmX8+ B1ln6CG26uFdg== From: Niklas Cassel To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org Cc: linux-pci@vger.kernel.org, Damien Le Moal , Kunihiko Hayashi , Niklas Cassel Subject: [PATCH 2/7] misc: pci_endpoint_test: Use IRQ_TYPE_* defines from UAPI header Date: Mon, 10 Mar 2025 12:10:19 +0100 Message-ID: <20250310111016.859445-11-cassel@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111016.859445-9-cassel@kernel.org> References: <20250310111016.859445-9-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6102; i=cassel@kernel.org; h=from:subject; bh=QxYKR2lxbSzV8kEj3MZitH3JX2jgAUVMNNRanilkk4c=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLPnZi35JJlY7izy6Se6LDkJa+4d7dc8eraw6+XM+l+n 9tKRtavHaUsDGJcDLJiiiy+P1z2F3e7TzmueMcGZg4rE8gQBi5OAZhIyGGGf3rns18fPL3p9Y5J yVll6V+OK/MWccs7d7FdzJVk9RA4XM/IMHnyyotht2cvellkoTXJfvvRGV/+Xf79T2PhonkRaxc JnuIHAA== X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA Use the IRQ_TYPE_* defines from the UAPI header rather than duplicating these defines in the driver itself. No functional change. Signed-off-by: Niklas Cassel --- drivers/misc/pci_endpoint_test.c | 46 ++++++++++++++++---------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index e3d9638b7a1b..849d730ba14d 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -28,11 +28,6 @@ #define DRV_MODULE_NAME "pci-endpoint-test" -#define IRQ_TYPE_UNDEFINED -1 -#define IRQ_TYPE_INTX 0 -#define IRQ_TYPE_MSI 1 -#define IRQ_TYPE_MSIX 2 - #define PCI_ENDPOINT_TEST_MAGIC 0x0 #define PCI_ENDPOINT_TEST_COMMAND 0x4 @@ -157,7 +152,7 @@ static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test) struct pci_dev *pdev = test->pdev; pci_free_irq_vectors(pdev); - test->irq_type = IRQ_TYPE_UNDEFINED; + test->irq_type = PCITEST_IRQ_TYPE_UNDEFINED; } static int pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test, @@ -168,7 +163,7 @@ static int pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test, struct device *dev = &pdev->dev; switch (type) { - case IRQ_TYPE_INTX: + case PCITEST_IRQ_TYPE_INTX: irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_INTX); if (irq < 0) { dev_err(dev, "Failed to get Legacy interrupt\n"); @@ -176,7 +171,7 @@ static int pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test, } break; - case IRQ_TYPE_MSI: + case PCITEST_IRQ_TYPE_MSI: irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI); if (irq < 0) { dev_err(dev, "Failed to get MSI interrupts\n"); @@ -184,7 +179,7 @@ static int pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test, } break; - case IRQ_TYPE_MSIX: + case PCITEST_IRQ_TYPE_MSIX: irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX); if (irq < 0) { dev_err(dev, "Failed to get MSI-X interrupts\n"); @@ -233,16 +228,16 @@ static int pci_endpoint_test_request_irq(struct pci_endpoint_test *test) fail: switch (test->irq_type) { - case IRQ_TYPE_INTX: + case PCITEST_IRQ_TYPE_INTX: dev_err(dev, "Failed to request IRQ %d for Legacy\n", pci_irq_vector(pdev, i)); break; - case IRQ_TYPE_MSI: + case PCITEST_IRQ_TYPE_MSI: dev_err(dev, "Failed to request IRQ %d for MSI %d\n", pci_irq_vector(pdev, i), i + 1); break; - case IRQ_TYPE_MSIX: + case PCITEST_IRQ_TYPE_MSIX: dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n", pci_irq_vector(pdev, i), i + 1); @@ -408,7 +403,7 @@ static int pci_endpoint_test_intx_irq(struct pci_endpoint_test *test) u32 val; pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, - IRQ_TYPE_INTX); + PCITEST_IRQ_TYPE_INTX); pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0); pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, COMMAND_RAISE_INTX_IRQ); @@ -428,7 +423,8 @@ static int pci_endpoint_test_msi_irq(struct pci_endpoint_test *test, int ret; pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, - msix ? IRQ_TYPE_MSIX : IRQ_TYPE_MSI); + msix ? PCITEST_IRQ_TYPE_MSIX : + PCITEST_IRQ_TYPE_MSI); pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num); pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, msix ? COMMAND_RAISE_MSIX_IRQ : @@ -504,7 +500,8 @@ static int pci_endpoint_test_copy(struct pci_endpoint_test *test, if (use_dma) flags |= FLAG_USE_DMA; - if (irq_type < IRQ_TYPE_INTX || irq_type > IRQ_TYPE_MSIX) { + if (irq_type < PCITEST_IRQ_TYPE_INTX || + irq_type > PCITEST_IRQ_TYPE_MSIX) { dev_err(dev, "Invalid IRQ type option\n"); return -EINVAL; } @@ -636,7 +633,8 @@ static int pci_endpoint_test_write(struct pci_endpoint_test *test, if (use_dma) flags |= FLAG_USE_DMA; - if (irq_type < IRQ_TYPE_INTX || irq_type > IRQ_TYPE_MSIX) { + if (irq_type < PCITEST_IRQ_TYPE_INTX || + irq_type > PCITEST_IRQ_TYPE_MSIX) { dev_err(dev, "Invalid IRQ type option\n"); return -EINVAL; } @@ -732,7 +730,8 @@ static int pci_endpoint_test_read(struct pci_endpoint_test *test, if (use_dma) flags |= FLAG_USE_DMA; - if (irq_type < IRQ_TYPE_INTX || irq_type > IRQ_TYPE_MSIX) { + if (irq_type < PCITEST_IRQ_TYPE_INTX || + irq_type > PCITEST_IRQ_TYPE_MSIX) { dev_err(dev, "Invalid IRQ type option\n"); return -EINVAL; } @@ -802,7 +801,8 @@ static int pci_endpoint_test_set_irq(struct pci_endpoint_test *test, struct device *dev = &pdev->dev; int ret; - if (req_irq_type < IRQ_TYPE_INTX || req_irq_type > IRQ_TYPE_MSIX) { + if (req_irq_type < PCITEST_IRQ_TYPE_INTX || + req_irq_type > PCITEST_IRQ_TYPE_MSIX) { dev_err(dev, "Invalid IRQ type option\n"); return -EINVAL; } @@ -926,7 +926,7 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev, test->test_reg_bar = 0; test->alignment = 0; test->pdev = pdev; - test->irq_type = IRQ_TYPE_UNDEFINED; + test->irq_type = PCITEST_IRQ_TYPE_UNDEFINED; data = (struct pci_endpoint_test_data *)ent->driver_data; if (data) { @@ -1077,23 +1077,23 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev) static const struct pci_endpoint_test_data default_data = { .test_reg_bar = BAR_0, .alignment = SZ_4K, - .irq_type = IRQ_TYPE_MSI, + .irq_type = PCITEST_IRQ_TYPE_MSI, }; static const struct pci_endpoint_test_data am654_data = { .test_reg_bar = BAR_2, .alignment = SZ_64K, - .irq_type = IRQ_TYPE_MSI, + .irq_type = PCITEST_IRQ_TYPE_MSI, }; static const struct pci_endpoint_test_data j721e_data = { .alignment = 256, - .irq_type = IRQ_TYPE_MSI, + .irq_type = PCITEST_IRQ_TYPE_MSI, }; static const struct pci_endpoint_test_data rk3588_data = { .alignment = SZ_64K, - .irq_type = IRQ_TYPE_MSI, + .irq_type = PCITEST_IRQ_TYPE_MSI, }; /* From patchwork Mon Mar 10 11:10:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 14009619 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 669BA226CF3 for ; Mon, 10 Mar 2025 11:10:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605057; cv=none; b=u6KMhHXZrPuXnxDmhbXxI3gqcwqMkWiJztUcz2hbwLcGrzz7Co8e7C26dRa2nY1KAVN19bWh8zZn8BvYFD5vsiADRjYuxKJFKBVD9WL5ozn70Yhpn/0ZSWdEZZfINmTgPw5FDNY/jRlWzYNWcYThhUdfUEs+wkB9YIzyP8PX4Bs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605057; c=relaxed/simple; bh=juce22VaNhSYxWpsQQ0/fJzfS3VarwxZrVt+ZJyTAFg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BK5qQddNN/gresp2gQlPmEyJsTHVKGnCxw/z8hTRvjM+zwG4doyzY86PlTUidnM5mMV7RU2zYzPIGRagxNTdK8dKalDxii743NWEQ52YXQDLHaj+k+Qc0fC4jmFirHm3OJL5nh3zG2NCrJkebFlQlree8QvHTCWAxBBT4Rs4QiM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=se0j7C0p; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="se0j7C0p" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1F4C8C4CEEE; Mon, 10 Mar 2025 11:10:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741605056; bh=juce22VaNhSYxWpsQQ0/fJzfS3VarwxZrVt+ZJyTAFg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=se0j7C0p3YDIEDwgGqphVqYtaGVC/JI1Y8ZJUPjwG6SwBzCxFkKKxZ+byOw+iZBNM 9hjZ9w4vmOmeoyER5wiRFJihAi6exCrwA8nAuO12wvXGs0qee7GuXlGlUY828cjwvS Uyj527zeWRDfsMt/hK+tlCWBuG3t4u+K5Jwitrsv0WbpJfQtYtYWfCfnztVP+ms2fu f7eGNjWtUEpBPjPKKNSnjm4hnFA0d9WYEGTf5y8Vz0kC25UVOox/v/uiYK4BLIdBCU d0riyv1tWLdMNqdRo638AxRCw42okSTRYhg7EbFV/+/F/1nCSf6L2ip4ESCrdRHl5Y Vtsq18dBiuqKA== From: Niklas Cassel To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org Cc: linux-pci@vger.kernel.org, Damien Le Moal , Kunihiko Hayashi , Niklas Cassel Subject: [PATCH 3/7] selftests: pci_endpoint: Use IRQ_TYPE_* defines from UAPI header Date: Mon, 10 Mar 2025 12:10:20 +0100 Message-ID: <20250310111016.859445-12-cassel@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111016.859445-9-cassel@kernel.org> References: <20250310111016.859445-9-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3125; i=cassel@kernel.org; h=from:subject; bh=juce22VaNhSYxWpsQQ0/fJzfS3VarwxZrVt+ZJyTAFg=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLPnZh3XnI3d7Gs653E1dtKz2aIPo8L7L9iusq9ddFVx fv5M82VO0pZGMS4GGTFFFl8f7jsL+52n3Jc8Y4NzBxWJpAhDFycAjARazOGv6JVXW1dl3cI3tl1 ++tn8xCbs1sEZ/8qn9wYI+Rc4rn5kwMjw6GL1U2HZ+zosUgLmr7J55+v+5M9vTwFETvOyGqvrRT 15AMA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA In order to improve readability, use the IRQ_TYPE_* defines from the UAPI header rather than using raw values. No functional change. Signed-off-by: Niklas Cassel --- .../selftests/pci_endpoint/pci_endpoint_test.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c b/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c index d05e107d0698..fdf4bc6aa9d2 100644 --- a/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c +++ b/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c @@ -99,11 +99,11 @@ TEST_F(pci_ep_basic, LEGACY_IRQ_TEST) { int ret; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, 0); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_INTX); ASSERT_EQ(0, ret) TH_LOG("Can't set Legacy IRQ type"); pci_ep_ioctl(PCITEST_GET_IRQTYPE, 0); - ASSERT_EQ(0, ret) TH_LOG("Can't get Legacy IRQ type"); + ASSERT_EQ(PCITEST_IRQ_TYPE_INTX, ret) TH_LOG("Can't get Legacy IRQ type"); pci_ep_ioctl(PCITEST_LEGACY_IRQ, 0); EXPECT_FALSE(ret) TH_LOG("Test failed for Legacy IRQ"); @@ -113,11 +113,11 @@ TEST_F(pci_ep_basic, MSI_TEST) { int ret, i; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI); ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type"); pci_ep_ioctl(PCITEST_GET_IRQTYPE, 0); - ASSERT_EQ(1, ret) TH_LOG("Can't get MSI IRQ type"); + ASSERT_EQ(PCITEST_IRQ_TYPE_MSI, ret) TH_LOG("Can't get MSI IRQ type"); for (i = 1; i <= 32; i++) { pci_ep_ioctl(PCITEST_MSI, i); @@ -129,11 +129,11 @@ TEST_F(pci_ep_basic, MSIX_TEST) { int ret, i; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, 2); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSIX); ASSERT_EQ(0, ret) TH_LOG("Can't set MSI-X IRQ type"); pci_ep_ioctl(PCITEST_GET_IRQTYPE, 0); - ASSERT_EQ(2, ret) TH_LOG("Can't get MSI-X IRQ type"); + ASSERT_EQ(PCITEST_IRQ_TYPE_MSIX, ret) TH_LOG("Can't get MSI-X IRQ type"); for (i = 1; i <= 2048; i++) { pci_ep_ioctl(PCITEST_MSIX, i); @@ -181,7 +181,7 @@ TEST_F(pci_ep_data_transfer, READ_TEST) if (variant->use_dma) param.flags = PCITEST_FLAGS_USE_DMA; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI); ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type"); for (i = 0; i < ARRAY_SIZE(test_size); i++) { @@ -200,7 +200,7 @@ TEST_F(pci_ep_data_transfer, WRITE_TEST) if (variant->use_dma) param.flags = PCITEST_FLAGS_USE_DMA; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI); ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type"); for (i = 0; i < ARRAY_SIZE(test_size); i++) { @@ -219,7 +219,7 @@ TEST_F(pci_ep_data_transfer, COPY_TEST) if (variant->use_dma) param.flags = PCITEST_FLAGS_USE_DMA; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, 1); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI); ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type"); for (i = 0; i < ARRAY_SIZE(test_size); i++) { From patchwork Mon Mar 10 11:10:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 14009620 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DB64226CF3 for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EIbcXKTu" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 49107C4CEEF; Mon, 10 Mar 2025 11:10:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741605059; bh=QqHlb9amokoslycep2GrTaleec2IM9DCX/kxSCszE8M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EIbcXKTuyd8QdqDegRa7wXBLn7NJy8n/ZZe4XlNO16m90E22X6rbg9hLRoFn+6Z4F XYag2qXQyVFRdmjTzkQkTGRQ7KWF+ougoXexfqSHy4Y/9+O3AAXW3mzDUcwEEwV3bA Uc8qxvTminmgSBbIKvA1yhnhz/4p+uDiGwdllIM+vSYqqBf4VuK0K80zr/rx0quGFJ n4G3uid/XCbWwjrLBWO89q+E9zYbH25t6wrj761h1wj9xPFvAJ61sxyFOvQ1jT+2Ww OhyoPra2q7wPl9UV9rlByq0GhAbEx5A+Rt2ADV0zC7GRJw9rTNSpA1QyVcMtIbGryw 35McLDTt38qIw== From: Niklas Cassel To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org Cc: linux-pci@vger.kernel.org, Damien Le Moal , Kunihiko Hayashi , Niklas Cassel Subject: [PATCH 4/7] PCI: endpoint: Add intx_capable to epc_features Date: Mon, 10 Mar 2025 12:10:21 +0100 Message-ID: <20250310111016.859445-13-cassel@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111016.859445-9-cassel@kernel.org> References: <20250310111016.859445-9-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=957; i=cassel@kernel.org; h=from:subject; bh=QqHlb9amokoslycep2GrTaleec2IM9DCX/kxSCszE8M=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLPnZg3Y33jp4K9bX3WnvopvqsSzi/snLH8G//SWM+I6 293nao72VHKwiDGxSArpsji+8Nlf3G3+5TjindsYOawMoEMYeDiFICJCFYyMkxisdI6fn/XEiuF 84m1N0z/GXEanuZuVfw7ZYrpvT1SJVwM/8yiXOabz1NRvpj75smf3rfJy6b1FEpvv/S5efr+G74 ia5gB X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA In struct pci_epc_features, an EPC driver can already specify if they support MSI (by setting msi_capable) and MSI-X (by setting msix_capable). Thus, for consistency, allow an EPC driver to specify if it supports INTx interrupts as well (by setting intx_capable). Since this struct is zero initialized, EPC drivers that want to claim INTx support will need to set intx_capable to true. Signed-off-by: Niklas Cassel --- include/linux/pci-epc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 9970ae73c8df..5872652291cc 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -232,6 +232,7 @@ struct pci_epc_features { unsigned int linkup_notifier : 1; unsigned int msi_capable : 1; unsigned int msix_capable : 1; + unsigned int intx_capable : 1; struct pci_epc_bar_desc bar[PCI_STD_NUM_BARS]; size_t align; }; From patchwork Mon Mar 10 11:10:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 14009621 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47870226CF3 for ; Mon, 10 Mar 2025 11:11:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605061; cv=none; b=LiJMV5AL7zvWG4BvQQwkPpePHKvhliHgkqN3sybT6q4ny6vg/A0mi9y2UPwHoRafjCBT7Ac5MXEYoeVZ7ajHLUl7467tZGfiRf3Juk+t+6X/btoKkpORq01Qs9WdOhV1KQ+k15u9jFhM0SF7Y7J3vlMdk1YTiCik7oyRXm2fpOY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605061; c=relaxed/simple; bh=n72aWwT98ZggG+Y6LDC3CZxTDfMDH7cYnt/JJu0ZCyQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SM9b5CFs6004P0nYmT4Tp6MjDw/+ejgIneNNcY/IvO6VR4N+dx33V/emvnBF4zzcj5UmO22jdzHeZOOcjmUs/SQWR8KQ7hDWIe9jMGuFUStuTGE2AF+Qwq5qiodRZ7rVo54xsaIQUoH2RCFrJQZKEMJYd6aOMxjBiJEJIf2+qlc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bH3e+cl/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bH3e+cl/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 72D02C4CEEE; Mon, 10 Mar 2025 11:10:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741605061; bh=n72aWwT98ZggG+Y6LDC3CZxTDfMDH7cYnt/JJu0ZCyQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bH3e+cl/htoNaJ4b0psi+3dk9Eb+/81kXsX+73wRmAk3zZPDwfwFLWt8U6FUNfH2F Kv8Iw5nQnmvXr0Rmt6wvfBHOquA+4jcVA8bzhz2epiZgR2nWKVLKGjoXcL7c+Cyj3a g9eDiaQP8CES4FQB6xgyGrhXePQx6qwPf73VxA608cVALWJkNllaMQ4Lt5A8WGvnXX McnrkmGfCdKhSkpmCr8khBHttXMFJH55/eW6tUfNtMkN/70T5Sh06kAez/ls10GUIg 5dbU0IaQMNJIKNfJUlGr5aZ95uIJLzHXA/cuAKWHdg8L5YcaVYOMLzDlOjuEe+6cCh a4kTxsEYVyCJA== From: Niklas Cassel To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org Cc: linux-pci@vger.kernel.org, Damien Le Moal , Kunihiko Hayashi , Niklas Cassel Subject: [PATCH 5/7] PCI: dw-rockchip: EP mode cannot raise INTx interrupts Date: Mon, 10 Mar 2025 12:10:22 +0100 Message-ID: <20250310111016.859445-14-cassel@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111016.859445-9-cassel@kernel.org> References: <20250310111016.859445-9-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1311; i=cassel@kernel.org; h=from:subject; bh=n72aWwT98ZggG+Y6LDC3CZxTDfMDH7cYnt/JJu0ZCyQ=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLPnZgXxtoZvf7jBas6X78P836cztPU8pm9ZJmz1tJ46 /CFJ0JvdJSyMIhxMciKKbL4/nDZX9ztPuW44h0bmDmsTCBDGLg4BWAi1WEM/2zr9i4877lgmmD4 Xu+88q5lTYIOrUVXdt83tHwZ0nzQ+SUjw//DDawu2XMfbdJysLcJlnsl/CGWZwpDvllsRTJX4dE qXgA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA Neither rk3568 or rk3588 supports INTx interrupts. Since epc_features is zero initialized, this is strictly not needed. However, setting intx_capable explicitly to false makes it more clear that neither rk3568 or rk3588 supports INTx interrupts. No functional change. Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index 7bf22146cfd1..c42766146e1e 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -298,6 +298,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features_rk3568 = { .linkup_notifier = true, .msi_capable = true, .msix_capable = true, + .intx_capable = false, .align = SZ_64K, .bar[BAR_0] = { .type = BAR_RESIZABLE, }, .bar[BAR_1] = { .type = BAR_RESIZABLE, }, @@ -318,6 +319,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features_rk3588 = { .linkup_notifier = true, .msi_capable = true, .msix_capable = true, + .intx_capable = false, .align = SZ_64K, .bar[BAR_0] = { .type = BAR_RESIZABLE, }, .bar[BAR_1] = { .type = BAR_RESIZABLE, }, From patchwork Mon Mar 10 11:10:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 14009622 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D64A8226CFB for ; Mon, 10 Mar 2025 11:11:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605063; cv=none; b=VlQcnF+szpbvSI/GxBxeP0E1CEQlpQVkR2HTU3PAv9s3gN7BzbHUuumb/c8NsLOrLoID45g75xiXI0HmE6zfVHohJOkrsDFkxEtdcm2qkJZeYlh3Dp19QSxIhe6C1nEg2zRy1Cf2WUzYnFBF9V1wfLCxqUXVF6KdQkvppc9N8EE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605063; c=relaxed/simple; bh=RygVxF9ieAoeCObdAaR8pPAuiCKcUgyM0R5/ztnFkTU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IBuTQN3MZ5dulTUhAEDgnuACDOEKfjDtxo20/rX70eSDcww04ZL7wmIH1opM1/K6sUtU1g+9NRgeRuo2C11gY3CpjWQtfdP9ZRVqr48T/x/SDOFe3wgGKXcnEqAaz0hTikF2pKIbcd/h5oChoi+hA+vwTAc02v7srAjA8qDdKZE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bQ/TorEI; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bQ/TorEI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9CA66C4CEEF; Mon, 10 Mar 2025 11:11:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741605063; bh=RygVxF9ieAoeCObdAaR8pPAuiCKcUgyM0R5/ztnFkTU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bQ/TorEISR+/JipfbaU0I4pxRg44XmBZwSbqavGhg/10DUPBXX52m4E33CYifuGC+ d3dXGGCr3qLnjShmI6cCLSUMnO3Rq+J6yoE6Bk+Zj/q7uA4xfm9zU49l4YEAwEb14k URyI9JXgkiF2QbWkEWEqyt6C1PRmbmDPlphE0FuTEJJpKZGrNmHq0K6YDOjZvajz9T wdDAvQLfBFhjCrYIWiJnwqSFpvP19mdIv1vE7dRMY9HfGsoW/sK0JHoz15Xrug1/PA kD0mno88oGXH3brhJlyFp7gMDeT5q4FAEVUKXeHokonBZ8MnRNu9dhQejGhvu7eX6a iQsROpG+jYlkA== From: Niklas Cassel To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org Cc: linux-pci@vger.kernel.org, Damien Le Moal , Kunihiko Hayashi , Niklas Cassel Subject: [PATCH 6/7] PCI: endpoint: pci-epf-test: Expose supported IRQ types in CAPS register Date: Mon, 10 Mar 2025 12:10:23 +0100 Message-ID: <20250310111016.859445-15-cassel@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111016.859445-9-cassel@kernel.org> References: <20250310111016.859445-9-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1322; i=cassel@kernel.org; h=from:subject; bh=RygVxF9ieAoeCObdAaR8pPAuiCKcUgyM0R5/ztnFkTU=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLPnZjHMf2Uzndv9qLOo4ee55Q91Nl9Wbw5tobppVmgo 0GFoqNzRykLgxgXg6yYIovvD5f9xd3uU44r3rGBmcPKBDKEgYtTACbiX8jwT2/z/6+FE10s2h+W Z25Se6Gu9nJ5XPjqry3RYSIrO/fO383IMPf9fs2PE8tTFZnnrQh4ecj6/uXomOb+HW3yRWIZytN c2AA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA Expose the supported IRQ types in the CAPS register. This way, the host side driver (drivers/misc/pci_endpoint_test.c) can know which IRQ types that the endpoint supports. The host side driver will make use of this information in a follow-up commit. Signed-off-by: Niklas Cassel --- drivers/pci/endpoint/functions/pci-epf-test.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 58ac19fcdd63..50eb4106369f 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -45,6 +45,9 @@ #define TIMER_RESOLUTION 1 #define CAP_UNALIGNED_ACCESS BIT(0) +#define CAP_MSI BIT(1) +#define CAP_MSIX BIT(2) +#define CAP_INTX BIT(3) static struct workqueue_struct *kpcitest_workqueue; @@ -774,6 +777,15 @@ static void pci_epf_test_set_capabilities(struct pci_epf *epf) if (epc->ops->align_addr) caps |= CAP_UNALIGNED_ACCESS; + if (epf_test->epc_features->msi_capable) + caps |= CAP_MSI; + + if (epf_test->epc_features->msix_capable) + caps |= CAP_MSIX; + + if (epf_test->epc_features->intx_capable) + caps |= CAP_INTX; + reg->caps = cpu_to_le32(caps); } From patchwork Mon Mar 10 11:10:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 14009623 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A01B8227E80 for ; Mon, 10 Mar 2025 11:11:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605065; cv=none; b=uGMNhU8jt68/NKIFdAn5AeiCbBwmkc7fQJkKU8YN2D3mBm4tBiQXbbFBqc6zKKPFa58OIkCThmeV+jX04lYbu1f3Q8o1i/AdOVT/GUG+O59KDnt0yEjZee9KZpdNKWCn5GtFxk7Aglm1KQtAPbsJXQ+JfVtIbssoW+rAUnxJ+Eo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741605065; c=relaxed/simple; bh=XHdl7kLwoXeGBDCBfA/I7mIVLny73tPykcs17tfW1hk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aYwlYqH+ukS3AD6Wc1lvjQHrPGHU6AcO+VYzQ5UwoySrJJYI7jmKbtewhcv8j4TDhqc0+WX6pD/bO+heKFeqSZ4ROQxqt5ziRisC3yFlO1FXLwPqClfvyeABmpjbD+oz8tqy3ZX4Ztwrjn4QZk89hPfwrDZx2e0UeEqznh6K1+4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ph8psdF2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ph8psdF2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C84A0C4CEEE; Mon, 10 Mar 2025 11:11:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741605065; bh=XHdl7kLwoXeGBDCBfA/I7mIVLny73tPykcs17tfW1hk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ph8psdF2wSVMxHAlxeDGaSi3ZzTXH3DKxr+bxvCKASHdDAtabpgDOhCMFgFU8KspD 8otW5tGkYDo3FsWwQuTcBVOKpzKcjh6QSU44/pVb48JZ/zxiMicmIo0bbzsUfmMFaS Kq2WVw6PBtHsqDYf74kSnC+cl3AYzPHE4U37pz9TBDzisUXEez6YWYxlroFkDO51q0 Y4sOOyEpeqNlwERHL1w5zUX1/+OMDyfO5KeKuRELYJYjeG0WpVmq5zh8vMShO5IebA I9oWy/X3sOLW6Q9QZgG9kYr8ezHeungyGMLlOvFNQELM1eWY++V5b4V1tbr5kseszc NQNZFs9QOjCcQ== From: Niklas Cassel To: bhelgaas@google.com, kw@linux.com, manivannan.sadhasivam@linaro.org Cc: linux-pci@vger.kernel.org, Damien Le Moal , Kunihiko Hayashi , Niklas Cassel Subject: [PATCH 7/7] misc: pci_endpoint_test: Add support for PCITEST_IRQ_TYPE_AUTO Date: Mon, 10 Mar 2025 12:10:24 +0100 Message-ID: <20250310111016.859445-16-cassel@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310111016.859445-9-cassel@kernel.org> References: <20250310111016.859445-9-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5544; i=cassel@kernel.org; h=from:subject; bh=XHdl7kLwoXeGBDCBfA/I7mIVLny73tPykcs17tfW1hk=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLPnZi3zFDEz8nu22/h5e2B+uvmsU7+OdvoH49L+M5nc 09Ym/4Q7yhlYRDjYpAVU2Tx/eGyv7jbfcpxxTs2MHNYmUCGMHBxCsBEzPQYGT7aq5XfDbj7Ko6h Yb6OuqekRuDG3huR06RmfmO7VWh4W5yR4Y3xiUwfk4wixsuey4Qa31WddMh2tghbnp95uv9D0+o z3AA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA For PCITEST_MSI we really want to set PCITEST_SET_IRQTYPE explicitly to PCITEST_IRQ_TYPE_MSI, since we want to test if MSI works. For PCITEST_MSIX we really want to set PCITEST_SET_IRQTYPE explicitly to PCITEST_IRQ_TYPE_MSIX, since we want to test if MSI works. For PCITEST_LEGACY_IRQ we really want to set PCITEST_SET_IRQTYPE explicitly to PCITEST_IRQ_TYPE_INTX, since we want to test if INTx works. However, for PCITEST_WRITE, PCITEST_READ, PCITEST_COPY, we really don't care which IRQ type that is used, we just want to use a IRQ type that is supported by the EPC. The old behavior was to always use MSI for PCITEST_WRITE, PCITEST_READ, PCITEST_COPY, was to always set IRQ type to MSI before doing the actual test, however, there are EPC drivers that do not support MSI. Add a new PCITEST_IRQ_TYPE_AUTO, that will use the CAPS register to see which IRQ types the endpoint supports, and use one of the supported IRQ types. For backwards compatibility, if the endpoint does not expose any supported IRQ type in the CAPS register, simply fallback to using MSI, as it was unconditionally done before. Signed-off-by: Niklas Cassel --- drivers/misc/pci_endpoint_test.c | 25 +++++++++++++++---- include/uapi/linux/pcitest.h | 1 + .../pci_endpoint/pci_endpoint_test.c | 12 ++++----- 3 files changed, 27 insertions(+), 11 deletions(-) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index 849d730ba14d..d294850a35a1 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -66,6 +66,9 @@ #define PCI_ENDPOINT_TEST_CAPS 0x30 #define CAP_UNALIGNED_ACCESS BIT(0) +#define CAP_MSI BIT(1) +#define CAP_MSIX BIT(2) +#define CAP_INTX BIT(3) #define PCI_DEVICE_ID_TI_AM654 0xb00c #define PCI_DEVICE_ID_TI_J7200 0xb00f @@ -112,6 +115,7 @@ struct pci_endpoint_test { struct miscdevice miscdev; enum pci_barno test_reg_bar; size_t alignment; + u32 ep_caps; const char *name; }; @@ -802,11 +806,23 @@ static int pci_endpoint_test_set_irq(struct pci_endpoint_test *test, int ret; if (req_irq_type < PCITEST_IRQ_TYPE_INTX || - req_irq_type > PCITEST_IRQ_TYPE_MSIX) { + req_irq_type > PCITEST_IRQ_TYPE_AUTO) { dev_err(dev, "Invalid IRQ type option\n"); return -EINVAL; } + if (req_irq_type == PCITEST_IRQ_TYPE_AUTO) { + if (test->ep_caps & CAP_MSI) + req_irq_type = PCITEST_IRQ_TYPE_MSI; + else if (test->ep_caps & CAP_MSIX) + req_irq_type = PCITEST_IRQ_TYPE_MSIX; + else if (test->ep_caps & CAP_INTX) + req_irq_type = PCITEST_IRQ_TYPE_INTX; + else + /* fallback to MSI if no caps defined */ + req_irq_type = PCITEST_IRQ_TYPE_MSI; + } + if (test->irq_type == req_irq_type) return 0; @@ -892,13 +908,12 @@ static void pci_endpoint_test_get_capabilities(struct pci_endpoint_test *test) { struct pci_dev *pdev = test->pdev; struct device *dev = &pdev->dev; - u32 caps; - caps = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CAPS); - dev_dbg(dev, "PCI_ENDPOINT_TEST_CAPS: %#x\n", caps); + test->ep_caps = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CAPS); + dev_dbg(dev, "PCI_ENDPOINT_TEST_CAPS: %#x\n", test->ep_caps); /* CAP_UNALIGNED_ACCESS is set if the EP can do unaligned access */ - if (caps & CAP_UNALIGNED_ACCESS) + if (test->ep_caps & CAP_UNALIGNED_ACCESS) test->alignment = 0; } diff --git a/include/uapi/linux/pcitest.h b/include/uapi/linux/pcitest.h index 304bf9be0f9a..d3aa8715a525 100644 --- a/include/uapi/linux/pcitest.h +++ b/include/uapi/linux/pcitest.h @@ -27,6 +27,7 @@ #define PCITEST_IRQ_TYPE_INTX 0 #define PCITEST_IRQ_TYPE_MSI 1 #define PCITEST_IRQ_TYPE_MSIX 2 +#define PCITEST_IRQ_TYPE_AUTO 3 #define PCITEST_FLAGS_USE_DMA 0x00000001 diff --git a/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c b/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c index fdf4bc6aa9d2..ac26481d29d9 100644 --- a/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c +++ b/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c @@ -181,8 +181,8 @@ TEST_F(pci_ep_data_transfer, READ_TEST) if (variant->use_dma) param.flags = PCITEST_FLAGS_USE_DMA; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI); - ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type"); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_AUTO); + ASSERT_EQ(0, ret) TH_LOG("Can't set AUTO IRQ type"); for (i = 0; i < ARRAY_SIZE(test_size); i++) { param.size = test_size[i]; @@ -200,8 +200,8 @@ TEST_F(pci_ep_data_transfer, WRITE_TEST) if (variant->use_dma) param.flags = PCITEST_FLAGS_USE_DMA; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI); - ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type"); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_AUTO); + ASSERT_EQ(0, ret) TH_LOG("Can't set AUTO IRQ type"); for (i = 0; i < ARRAY_SIZE(test_size); i++) { param.size = test_size[i]; @@ -219,8 +219,8 @@ TEST_F(pci_ep_data_transfer, COPY_TEST) if (variant->use_dma) param.flags = PCITEST_FLAGS_USE_DMA; - pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_MSI); - ASSERT_EQ(0, ret) TH_LOG("Can't set MSI IRQ type"); + pci_ep_ioctl(PCITEST_SET_IRQTYPE, PCITEST_IRQ_TYPE_AUTO); + ASSERT_EQ(0, ret) TH_LOG("Can't set AUTO IRQ type"); for (i = 0; i < ARRAY_SIZE(test_size); i++) { param.size = test_size[i];