From patchwork Mon Mar 10 17:18:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14010437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CBCB0C35FF1 for ; Mon, 10 Mar 2025 17:18:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BDDC810E49F; Mon, 10 Mar 2025 17:18:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="RFSIVfxr"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2A87610E035; Mon, 10 Mar 2025 17:18:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741627115; x=1773163115; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NBeXvSWAsJ4e7D6fq+XzQgXufZPHcwB28J2XpBnFFR8=; b=RFSIVfxrs3Y5o7RNZvdvX7OgpoeuGJxLnS7Gb6kbTob9zF3y/WvObfNw KO/9thPlPQsrMgT2kw+lQ5+MlXDrHR6dCtcy37vG264m0MTF2kPA7STYV kzS+8qeT4y/iJTqrXQ5awPMqJ5Cw8jTqYxxWrvA/ASbUKWWhBm3O76CEA T1P7TEqj5S5CvlcW6Qo4TUiIIutrqKrvcGhQUvWsAzKrRDg5lPMLuqdtw 4tBdPh/6i3hvkJ5i0VWxI9otamgSWD5PyZFXgxgCub0TuatffYQrLMhDF 945qYWbJA75ov11FWSepOGf+g6I5qp98X61GS2dYKXiEzXrP2Y9ZLdBLz g==; X-CSE-ConnectionGUID: gNc1gmfUTjaILuLkaOa9dQ== X-CSE-MsgGUID: oNHukvsZTuyDhyt5Ofu6TA== X-IronPort-AV: E=McAfee;i="6700,10204,11369"; a="42669299" X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="42669299" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:35 -0700 X-CSE-ConnectionGUID: OxcHa6tCRZmOB3mnKGsRGQ== X-CSE-MsgGUID: cptud0LPSCSx12cC0OSTVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="125097615" Received: from dut4432lnl.fm.intel.com ([10.105.10.85]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:34 -0700 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v7 1/6] drm/xe/xe_gt_pagefault: Disallow writes to read-only VMAs Date: Mon, 10 Mar 2025 17:18:29 +0000 Message-ID: <20250310171834.78299-2-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250310171834.78299-1-jonathan.cavitt@intel.com> References: <20250310171834.78299-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The page fault handler should reject write/atomic access to read only VMAs. Add code to handle this in handle_pagefault after the VMA lookup. Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling") Signed-off-by: Jonathan Cavitt Suggested-by: Matthew Brost --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index c5ad9a0a89c2..a4e688e72efd 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -237,6 +237,11 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf) goto unlock_vm; } + if (xe_vma_read_only(vma) && pf->access_type != ACCESS_TYPE_READ) { + err = -EPERM; + goto unlock_vm; + } + atomic = access_is_atomic(pf->access_type); if (xe_vma_is_cpu_addr_mirror(vma)) From patchwork Mon Mar 10 17:18:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14010435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2FC7BC35FF1 for ; Mon, 10 Mar 2025 17:18:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5AAD910E49B; Mon, 10 Mar 2025 17:18:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="M2sM1a50"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 487FE10E00A; Mon, 10 Mar 2025 17:18:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741627115; x=1773163115; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zRC7H4cC6sNb29jEFb7rfdw7OLmZ4f7I74F62LPVQE0=; b=M2sM1a50u10jpoRwM5HAu/AHopnOZwGTPN+Q4Qzmha27DSq6g1mukHN6 jJdl/mru3wHKtRZ4OhP8Ar+gC22zQ9sG10LNq+iZKH3IOATHFaQiwtN7T JVmxvb8hffOwqWsFIxYN4YDHdvEI+o55B5xgskABbGqzXyr3vgUVMCGia vKo+oKtjU2k479ccxZ3vMl9c+xmUU+2D1Qu28XamcioNkDj4E1SFx40He MlplTaAIUf97xZRVBQ9RugbzYT5Zl/UIE0evpxzbHYHfojAHINF6ixQKK 2B6V0upEA7ogMuGUzvrQ51zYzZMZHia3i/dtCK9GkwsYppUsu1F3fseqp A==; X-CSE-ConnectionGUID: MiHwCAASTn+BKUuOvCmnkw== X-CSE-MsgGUID: C6AMJQv4SW+Mice4oId7Bw== X-IronPort-AV: E=McAfee;i="6700,10204,11369"; a="42669300" X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="42669300" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:35 -0700 X-CSE-ConnectionGUID: giLgyvDvRlKPHHTOqwg/2g== X-CSE-MsgGUID: /ApNN1hbSWOU2X6weiLYBw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="125097619" Received: from dut4432lnl.fm.intel.com ([10.105.10.85]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:34 -0700 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v7 2/6] drm/xe/xe_gt_pagefault: Migrate pagefault struct to header Date: Mon, 10 Mar 2025 17:18:30 +0000 Message-ID: <20250310171834.78299-3-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250310171834.78299-1-jonathan.cavitt@intel.com> References: <20250310171834.78299-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Migrate the pagefault struct from xe_gt_pagefault.c to the xe_gt_pagefault.h header file, along with the associated enum values. v2: Normalize names for common header (Matt Brost) Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 41 +++++----------------------- drivers/gpu/drm/xe/xe_gt_pagefault.h | 28 +++++++++++++++++++ 2 files changed, 35 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index a4e688e72efd..c8a9058aa09f 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -23,33 +23,6 @@ #include "xe_trace_bo.h" #include "xe_vm.h" -struct pagefault { - u64 page_addr; - u32 asid; - u16 pdata; - u8 vfid; - u8 access_type; - u8 fault_type; - u8 fault_level; - u8 engine_class; - u8 engine_instance; - u8 fault_unsuccessful; - bool trva_fault; -}; - -enum access_type { - ACCESS_TYPE_READ = 0, - ACCESS_TYPE_WRITE = 1, - ACCESS_TYPE_ATOMIC = 2, - ACCESS_TYPE_RESERVED = 3, -}; - -enum fault_type { - NOT_PRESENT = 0, - WRITE_ACCESS_VIOLATION = 1, - ATOMIC_ACCESS_VIOLATION = 2, -}; - struct acc { u64 va_range_base; u32 asid; @@ -61,9 +34,9 @@ struct acc { u8 engine_instance; }; -static bool access_is_atomic(enum access_type access_type) +static bool access_is_atomic(enum xe_pagefault_access_type access_type) { - return access_type == ACCESS_TYPE_ATOMIC; + return access_type == XE_PAGEFAULT_ACCESS_TYPE_ATOMIC; } static bool vma_is_valid(struct xe_tile *tile, struct xe_vma *vma) @@ -205,7 +178,7 @@ static struct xe_vm *asid_to_vm(struct xe_device *xe, u32 asid) return vm; } -static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf) +static int handle_pagefault(struct xe_gt *gt, struct xe_pagefault *pf) { struct xe_device *xe = gt_to_xe(gt); struct xe_vm *vm; @@ -237,7 +210,7 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf) goto unlock_vm; } - if (xe_vma_read_only(vma) && pf->access_type != ACCESS_TYPE_READ) { + if (xe_vma_read_only(vma) && pf->access_type != XE_PAGEFAULT_ACCESS_TYPE_READ) { err = -EPERM; goto unlock_vm; } @@ -271,7 +244,7 @@ static int send_pagefault_reply(struct xe_guc *guc, return xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0); } -static void print_pagefault(struct xe_device *xe, struct pagefault *pf) +static void print_pagefault(struct xe_device *xe, struct xe_pagefault *pf) { drm_dbg(&xe->drm, "\n\tASID: %d\n" "\tVFID: %d\n" @@ -291,7 +264,7 @@ static void print_pagefault(struct xe_device *xe, struct pagefault *pf) #define PF_MSG_LEN_DW 4 -static bool get_pagefault(struct pf_queue *pf_queue, struct pagefault *pf) +static bool get_pagefault(struct pf_queue *pf_queue, struct xe_pagefault *pf) { const struct xe_guc_pagefault_desc *desc; bool ret = false; @@ -378,7 +351,7 @@ static void pf_queue_work_func(struct work_struct *w) struct xe_gt *gt = pf_queue->gt; struct xe_device *xe = gt_to_xe(gt); struct xe_guc_pagefault_reply reply = {}; - struct pagefault pf = {}; + struct xe_pagefault pf = {}; unsigned long threshold; int ret; diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.h b/drivers/gpu/drm/xe/xe_gt_pagefault.h index 839c065a5e4c..33616043d17a 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.h +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.h @@ -11,6 +11,34 @@ struct xe_gt; struct xe_guc; +struct xe_pagefault { + u64 page_addr; + u32 asid; + u16 pdata; + u8 vfid; + u8 access_type; + u8 fault_type; + u8 fault_level; + u8 engine_class; + u8 engine_instance; + u8 fault_unsuccessful; + bool prefetch; + bool trva_fault; +}; + +enum xe_pagefault_access_type { + XE_PAGEFAULT_ACCESS_TYPE_READ = 0, + XE_PAGEFAULT_ACCESS_TYPE_WRITE = 1, + XE_PAGEFAULT_ACCESS_TYPE_ATOMIC = 2, + XE_PAGEFAULT_ACCESS_TYPE_RESERVED = 3, +}; + +enum xe_pagefault_type { + XE_PAGEFAULT_TYPE_NOT_PRESENT = 0, + XE_PAGEFAULT_TYPE_WRITE_ACCESS_VIOLATION = 1, + XE_PAGEFAULT_TYPE_ATOMIC_ACCESS_VIOLATION = 2, +}; + int xe_gt_pagefault_init(struct xe_gt *gt); void xe_gt_pagefault_reset(struct xe_gt *gt); int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len); From patchwork Mon Mar 10 17:18:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14010438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AEC21C35FF3 for ; Mon, 10 Mar 2025 17:18:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC53610E4A0; Mon, 10 Mar 2025 17:18:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OJBI+axq"; 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d="scan'208";a="42669301" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:35 -0700 X-CSE-ConnectionGUID: qBLZt45iR+eh7LirqTebAw== X-CSE-MsgGUID: tgcP2OqzQRexJjMgrJGjiw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="125097621" Received: from dut4432lnl.fm.intel.com ([10.105.10.85]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:34 -0700 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v7 3/6] drm/xe/xe_vm: Add per VM pagefault info Date: Mon, 10 Mar 2025 17:18:31 +0000 Message-ID: <20250310171834.78299-4-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250310171834.78299-1-jonathan.cavitt@intel.com> References: <20250310171834.78299-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add additional information to each VM so they can report up to the first 50 seen pagefaults. Only failed pagefaults are saved this way, as successful pagefaults should recover and not need to be reported to userspace. v2: - Free vm after use (Shuicheng) - Compress pf copy logic (Shuicheng) - Update fault_unsuccessful before storing (Shuicheng) - Fix old struct name in comments (Shuicheng) - Keep first 50 pagefaults instead of last 50 (Jianxun) v3: - Avoid unnecessary execution by checking MAX_PFS earlier (jcavitt) - Fix double-locking error (jcavitt) - Assert kmemdump is successful (Shuicheng) Signed-off-by: Jonathan Cavitt Suggested-by: Matthew Brost CC: Shuicheng Lin CC: Zhang Jianxun --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 29 +++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_vm.c | 32 ++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_vm.h | 6 ++++++ drivers/gpu/drm/xe/xe_vm_types.h | 20 +++++++++++++++++ 4 files changed, 87 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index c8a9058aa09f..7661b9ad1cd0 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -343,6 +343,34 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len) return full ? -ENOSPC : 0; } +static void save_pagefault_to_vm(struct xe_device *xe, struct xe_pagefault *pf) +{ + struct xe_vm *vm; + struct xe_pagefault *store; + + vm = asid_to_vm(xe, pf->asid); + if (IS_ERR(vm)) + return; + + spin_lock(&vm->pfs.lock); + + /** + * Limit the number of pfs in the pf list to prevent memory overuse. + */ + if (vm->pfs.len < MAX_PFS) { + store = kmemdup(pf, sizeof(*pf), GFP_KERNEL); + if (store) + xe_vm_add_pf_entry(vm, store); + else + drm_warn(&vm->xe->drm, + "Could not allocate memory for fault %i!", + vm->pfs.len); + } + + spin_unlock(&vm->pfs.lock); + xe_vm_put(vm); +} + #define USM_QUEUE_MAX_RUNTIME_MS 20 static void pf_queue_work_func(struct work_struct *w) @@ -362,6 +390,7 @@ static void pf_queue_work_func(struct work_struct *w) if (unlikely(ret)) { print_pagefault(xe, &pf); pf.fault_unsuccessful = 1; + save_pagefault_to_vm(xe, &pf); drm_dbg(&xe->drm, "Fault response: Unsuccessful %d\n", ret); } diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 22a26aff3a6e..ff79ba8d3794 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -778,6 +778,33 @@ int xe_vm_userptr_check_repin(struct xe_vm *vm) list_empty_careful(&vm->userptr.invalidated)) ? 0 : -EAGAIN; } +void xe_vm_add_pf_entry(struct xe_vm *vm, struct xe_pagefault *pf) +{ + /** vm->pfs.lock must be held before calling this function */ + struct xe_vm_pf_entry *e = NULL; + + e = kzalloc(sizeof(*e), GFP_KERNEL); + xe_assert(vm->xe, e); + e->pf = pf; + + list_add_tail(&e->list, &vm->pfs.list); + vm->pfs.len++; +} + +void xe_vm_remove_pf_entries(struct xe_vm *vm) +{ + struct xe_vm_pf_entry *e, *tmp; + + spin_lock(&vm->pfs.lock); + list_for_each_entry_safe(e, tmp, &vm->pfs.list, list) { + list_del(&e->list); + kfree(e->pf); + kfree(e); + } + vm->pfs.len = 0; + spin_unlock(&vm->pfs.lock); +} + static int xe_vma_ops_alloc(struct xe_vma_ops *vops, bool array_of_binds) { int i; @@ -1660,6 +1687,9 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags) init_rwsem(&vm->userptr.notifier_lock); spin_lock_init(&vm->userptr.invalidated_lock); + INIT_LIST_HEAD(&vm->pfs.list); + spin_lock_init(&vm->pfs.lock); + ttm_lru_bulk_move_init(&vm->lru_bulk_move); INIT_WORK(&vm->destroy_work, vm_destroy_work_func); @@ -1930,6 +1960,8 @@ void xe_vm_close_and_put(struct xe_vm *vm) } up_write(&xe->usm.lock); + xe_vm_remove_pf_entries(vm); + for_each_tile(tile, xe, id) xe_range_fence_tree_fini(&vm->rftree[id]); diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h index 0ef811fc2bde..fe068e4448a6 100644 --- a/drivers/gpu/drm/xe/xe_vm.h +++ b/drivers/gpu/drm/xe/xe_vm.h @@ -12,6 +12,8 @@ #include "xe_map.h" #include "xe_vm_types.h" +#define MAX_PFS 50 + struct drm_device; struct drm_printer; struct drm_file; @@ -257,6 +259,10 @@ int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma); int xe_vma_userptr_check_repin(struct xe_userptr_vma *uvma); +void xe_vm_add_pf_entry(struct xe_vm *vm, struct xe_pagefault *pf); + +void xe_vm_remove_pf_entries(struct xe_vm *vm); + bool xe_vm_validate_should_retry(struct drm_exec *exec, int err, ktime_t *end); int xe_vm_lock_vma(struct drm_exec *exec, struct xe_vma *vma); diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h index 84fa41b9fa20..3a2329f54fb1 100644 --- a/drivers/gpu/drm/xe/xe_vm_types.h +++ b/drivers/gpu/drm/xe/xe_vm_types.h @@ -19,6 +19,7 @@ #include "xe_range_fence.h" struct xe_bo; +struct xe_pagefault; struct xe_svm_range; struct xe_sync_entry; struct xe_user_fence; @@ -142,6 +143,13 @@ struct xe_userptr_vma { struct xe_device; +struct xe_vm_pf_entry { + /** @pf: observed pagefault */ + struct xe_pagefault *pf; + /** @list: link into @xe_vm.pfs.list */ + struct list_head list; +}; + struct xe_vm { /** @gpuvm: base GPUVM used to track VMAs */ struct drm_gpuvm gpuvm; @@ -305,6 +313,18 @@ struct xe_vm { bool capture_once; } error_capture; + /** + * @pfs: List of all pagefaults associated with this VM + */ + struct { + /** @lock: lock protecting @pfs.list */ + spinlock_t lock; + /** @list: list of xe_exec_queue_ban_entry entries */ + struct list_head list; + /** @len: length of @pfs.list */ + unsigned int len; + } pfs; + /** * @tlb_flush_seqno: Required TLB flush seqno for the next exec. * protected by the vm resv. From patchwork Mon Mar 10 17:18:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14010434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56608C35FF2 for ; Mon, 10 Mar 2025 17:18:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3148310E498; Mon, 10 Mar 2025 17:18:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="RlWwPvl+"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7C96C10E00A; Mon, 10 Mar 2025 17:18:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741627116; x=1773163116; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Js3F+xcvqQ/b3H2lkKt5SK4bLmNS8gHwcvM+mikSozk=; b=RlWwPvl+0/wXIunNRF+hDgtdFSNsLrg1LAc1DYZu298JMvUeu1FgHGHa c1jaMmihZF4wS9baO8ojG2RqikixyzxYJ3zAkdddv3ndjc5FhAgt/4uju 7Io0W+CwdvJkdoYNoO5o3aQ9Qlrb9WWC/6JE1agk9wNV5VVC3L1ci7SCH 63Q+OuF4XqcowKJxeyMSFDwrDVhO48ao1zGsw8GhQ7qxyPy2cnB1+wWje DfuEbJ4kkwXZhaftYsnu4kHZ3qfx88tBLpFG7/4mNrmnt3Kcl+XuFXxSu NSCdu07m8nvbYwixkwDfE2ALjxTFQPpC7JnkdaZwMW7iUhmy2xMIjQtzH g==; X-CSE-ConnectionGUID: LkXAH32wTPaA4jxSdPVrHQ== X-CSE-MsgGUID: nUAqcQpzRW+qWAUUv2DlRQ== X-IronPort-AV: E=McAfee;i="6700,10204,11369"; a="42669302" X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="42669302" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:35 -0700 X-CSE-ConnectionGUID: N5cQE5IcT+Cm0I/57EKjcA== X-CSE-MsgGUID: N6C4bHqBTROEzj2bcFd5Ew== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="125097624" Received: from dut4432lnl.fm.intel.com ([10.105.10.85]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:34 -0700 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v7 4/6] drm/xe/uapi: Define drm_xe_vm_get_faults Date: Mon, 10 Mar 2025 17:18:32 +0000 Message-ID: <20250310171834.78299-5-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250310171834.78299-1-jonathan.cavitt@intel.com> References: <20250310171834.78299-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add initial declarations for the drm_xe_vm_get_faults ioctl. Signed-off-by: Jonathan Cavitt --- include/uapi/drm/xe_drm.h | 49 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h index 616916985e3f..90c2fcdbd5c1 100644 --- a/include/uapi/drm/xe_drm.h +++ b/include/uapi/drm/xe_drm.h @@ -81,6 +81,7 @@ extern "C" { * - &DRM_IOCTL_XE_EXEC * - &DRM_IOCTL_XE_WAIT_USER_FENCE * - &DRM_IOCTL_XE_OBSERVATION + * - %DRM_IOCTL_XE_VM_GET_FAULTS */ /* @@ -102,6 +103,7 @@ extern "C" { #define DRM_XE_EXEC 0x09 #define DRM_XE_WAIT_USER_FENCE 0x0a #define DRM_XE_OBSERVATION 0x0b +#define DRM_XE_VM_GET_FAULTS 0x0c /* Must be kept compact -- no holes */ @@ -117,6 +119,7 @@ extern "C" { #define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec) #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence) #define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param) +#define DRM_IOCTL_XE_VM_GET_FAULTS DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_GET_FAULTS, struct drm_xe_vm_get_faults) /** * DOC: Xe IOCTL Extensions @@ -1189,6 +1192,52 @@ struct drm_xe_vm_bind { __u64 reserved[2]; }; +struct xe_vm_fault { + /** @address: Address of the fault, if relevant */ + __u64 address; +#define DRM_XE_FAULT_ADDRESS_TYPE_NONE_EXT 0 +#define DRM_XE_FAULT_ADDRESS_TYPE_READ_INVALID_EXT 1 +#define DRM_XE_FAULT_ADDRESS_TYPE_WRITE_INVALID_EXT 2 + /** @address_type: , if relevant */ + __u32 address_type; + /** + * @address_precision: Precision of faulted address, if relevant. + * Currently only SZ_4K. + */ + __u32 address_precision; + /** @reserved: MBZ */ + __u64 reserved[3]; +}; + +/** + * struct drm_xe_vm_get_faults - Input of &DRM_IOCTL_XE_VM_GET_FAULTS + * + * The user provides a VM ID, and the ioctl will + * + */ +struct drm_xe_vm_get_faults { + /** @extensions: Pointer to the first extension struct, if any */ + __u64 extensions; + + /** @vm_id: The ID of the VM to query the properties of */ + __u32 vm_id; + + /** @size: Size to allocate for @ptr */ + __u32 size; + + /** @fault_count: Number of faults to be returned */ + __u32 fault_count; + + /** @pad: MBZ */ + __u32 pad; + + /** @reserved: MBZ */ + __u64 reserved[2]; + + /** @faults: Pointer to user-defined array of xe_vm_fault of flexible size */ + __u64 faults; +}; + /** * struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE * From patchwork Mon Mar 10 17:18:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14010436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0506C35FF2 for ; Mon, 10 Mar 2025 17:18:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7766210E49D; Mon, 10 Mar 2025 17:18:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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a="42669304" X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="42669304" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:35 -0700 X-CSE-ConnectionGUID: dbcaVMh8QY6VElyS7p3zpw== X-CSE-MsgGUID: vH9vbN69Qt6mmgC+6kV31w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="125097627" Received: from dut4432lnl.fm.intel.com ([10.105.10.85]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:34 -0700 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v7 5/6] drm/xe/xe_gt_pagefault: Add address_type field to pagefaults Date: Mon, 10 Mar 2025 17:18:33 +0000 Message-ID: <20250310171834.78299-6-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250310171834.78299-1-jonathan.cavitt@intel.com> References: <20250310171834.78299-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a new field to the xe_pagefault struct, address_type, that tracks the type of fault the pagefault incurred. Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 3 +++ drivers/gpu/drm/xe/xe_gt_pagefault.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index 7661b9ad1cd0..69ac8f437d11 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -206,11 +206,13 @@ static int handle_pagefault(struct xe_gt *gt, struct xe_pagefault *pf) vma = lookup_vma(vm, pf->page_addr); if (!vma) { + pf->address_type = DRM_XE_FAULT_ADDRESS_TYPE_NONE_EXT; err = -EINVAL; goto unlock_vm; } if (xe_vma_read_only(vma) && pf->access_type != XE_PAGEFAULT_ACCESS_TYPE_READ) { + pf->address_type = DRM_XE_FAULT_ADDRESS_TYPE_WRITE_INVALID_EXT; err = -EPERM; goto unlock_vm; } @@ -284,6 +286,7 @@ static bool get_pagefault(struct pf_queue *pf_queue, struct xe_pagefault *pf) pf->asid = FIELD_GET(PFD_ASID, desc->dw1); pf->vfid = FIELD_GET(PFD_VFID, desc->dw2); pf->access_type = FIELD_GET(PFD_ACCESS_TYPE, desc->dw2); + pf->address_type = 0; pf->fault_type = FIELD_GET(PFD_FAULT_TYPE, desc->dw2); pf->page_addr = (u64)(FIELD_GET(PFD_VIRTUAL_ADDR_HI, desc->dw3)) << PFD_VIRTUAL_ADDR_HI_SHIFT; diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.h b/drivers/gpu/drm/xe/xe_gt_pagefault.h index 33616043d17a..969f7b458d3f 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.h +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.h @@ -17,6 +17,7 @@ struct xe_pagefault { u16 pdata; u8 vfid; u8 access_type; + u8 address_type; u8 fault_type; u8 fault_level; u8 engine_class; From patchwork Mon Mar 10 17:18:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14010439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2ED0C282DE for ; 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X-CSE-ConnectionGUID: 59fxC6MyR1WR43547at6NQ== X-CSE-MsgGUID: i4Y3n2S+R1Wg6MyT8tpLxA== X-IronPort-AV: E=McAfee;i="6700,10204,11369"; a="42669305" X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="42669305" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:35 -0700 X-CSE-ConnectionGUID: PLjnNUosQC+ycaWZC9lIrg== X-CSE-MsgGUID: NSRSsDWCTYuVDNFU6gi4UQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="125097630" Received: from dut4432lnl.fm.intel.com ([10.105.10.85]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 10:18:34 -0700 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v7 6/6] drm/xe/xe_vm: Implement xe_vm_get_faults_ioctl Date: Mon, 10 Mar 2025 17:18:34 +0000 Message-ID: <20250310171834.78299-7-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250310171834.78299-1-jonathan.cavitt@intel.com> References: <20250310171834.78299-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for userspace to request a list of observed failed pagefaults from a specified VM. v2: - Only allow querying of failed pagefaults (Matt Brost) v3: - Remove unnecessary size parameter from helper function, as it is a property of the arguments. (jcavitt) - Remove unnecessary copy_from_user (Jainxun) - Set address_precision to 1 (Jainxun) - Report max size instead of dynamic size for memory allocation purposes. Total memory usage is reported separately. v4: - Return int from xe_vm_get_property_size (Shuicheng) - Fix memory leak (Shuicheng) - Remove unnecessary size variable (jcavitt) v5: - Rename ioctl to xe_vm_get_faults_ioctl (jcavitt) - Update fill_property_pfs to eliminate need for kzalloc (Jianxun) v6: - Repair and move fill_faults break condition (Dan Carpenter) - Free vm after use (jcavitt) - Combine assertions (jcavitt) - Expand size check in xe_vm_get_faults_ioctl (jcavitt) - Remove return mask from fill_faults, as return is already -EFAULT or 0 (jcavitt) Signed-off-by: Jonathan Cavitt Suggested-by: Matthew Brost CC: Jainxun Zhang CC: Shuicheng Lin --- drivers/gpu/drm/xe/xe_device.c | 3 ++ drivers/gpu/drm/xe/xe_vm.c | 87 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_vm.h | 2 + 3 files changed, 92 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index 5d79b439dd62..2d22b3c2df09 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -194,6 +194,9 @@ static const struct drm_ioctl_desc xe_ioctls[] = { DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(XE_OBSERVATION, xe_observation_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(XE_VM_GET_FAULTS, xe_vm_get_faults_ioctl, + DRM_RENDER_ALLOW), + }; static long xe_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index ff79ba8d3794..cb86be26bce2 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -3528,6 +3528,93 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file) return err; } +static int xe_vm_get_faults_size(struct xe_vm *vm) +{ + int size; + + spin_lock(&vm->pfs.lock); + size = vm->pfs.len * sizeof(struct xe_vm_fault); + spin_unlock(&vm->pfs.lock); + + return size; +} + +static int fill_faults(struct xe_vm *vm, + struct drm_xe_vm_get_faults *args) +{ + struct xe_vm_fault __user *usr_ptr = u64_to_user_ptr(args->faults); + struct xe_vm_pf_entry *entry; + int ret = 0, i = 0; + + spin_lock(&vm->pfs.lock); + list_for_each_entry(entry, &vm->pfs.list, list) { + struct xe_pagefault *pf = entry->pf; + + if (i++ == args->fault_count) + break; + + ret = put_user(pf->page_addr, &usr_ptr->address); + if (ret) + break; + + ret = put_user(pf->address_type, &usr_ptr->address_type); + if (ret) + break; + + ret = put_user(1, &usr_ptr->address_precision); + if (ret) + break; + + usr_ptr++; + } + spin_unlock(&vm->pfs.lock); + + return ret; +} + +int xe_vm_get_faults_ioctl(struct drm_device *drm, void *data, + struct drm_file *file) +{ + struct xe_device *xe = to_xe_device(drm); + struct xe_file *xef = to_xe_file(file); + struct drm_xe_vm_get_faults *args = data; + struct xe_vm *vm; + int size, fault_count, ret = 0; + + if (XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1])) + return -EINVAL; + + vm = xe_vm_lookup(xef, args->vm_id); + if (XE_IOCTL_DBG(xe, !vm)) + return -ENOENT; + + size = xe_vm_get_faults_size(vm); + fault_count = size / sizeof(struct xe_vm_fault); + + if (size < 0) { + ret = size; + goto put_vm; + } else if (!args->size && !args->fault_count) { + args->size = size; + args->fault_count = fault_count; + goto put_vm; + } + + if (XE_IOCTL_DBG(xe, args->size > size) || + XE_IOCTL_DBG(xe, args->fault_count > fault_count) || + XE_IOCTL_DBG(xe, args->size % sizeof(struct xe_vm_fault)) || + XE_IOCTL_DBG(xe, args->size / sizeof(struct xe_vm_fault) != args->fault_count)) { + ret = -EINVAL; + goto put_vm; + } + + ret = fill_faults(vm, args); + +put_vm: + xe_vm_put(vm); + return ret; +} + /** * xe_vm_bind_kernel_bo - bind a kernel BO to a VM * @vm: VM to bind the BO to diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h index fe068e4448a6..c48bd6e6fe34 100644 --- a/drivers/gpu/drm/xe/xe_vm.h +++ b/drivers/gpu/drm/xe/xe_vm.h @@ -191,6 +191,8 @@ int xe_vm_destroy_ioctl(struct drm_device *dev, void *data, struct drm_file *file); int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file); +int xe_vm_get_faults_ioctl(struct drm_device *dev, void *data, + struct drm_file *file); void xe_vm_close_and_put(struct xe_vm *vm);