From patchwork Sat Mar 15 01:00:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Mukhin X-Patchwork-Id: 14017661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8D0CEC28B2F for ; Sat, 15 Mar 2025 01:01:17 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.915595.1321079 (Exim 4.92) (envelope-from ) id 1ttFtY-0004In-HY; Sat, 15 Mar 2025 01:00:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 915595.1321079; Sat, 15 Mar 2025 01:00:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ttFtY-0004Hy-DA; Sat, 15 Mar 2025 01:00:56 +0000 Received: by outflank-mailman (input) for mailman id 915595; Sat, 15 Mar 2025 01:00:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ttFtW-0003LX-V4 for xen-devel@lists.xenproject.org; Sat, 15 Mar 2025 01:00:54 +0000 Received: from mail-40134.protonmail.ch (mail-40134.protonmail.ch [185.70.40.134]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f1aeb786-0138-11f0-9ab9-95dc52dad729; Sat, 15 Mar 2025 02:00:53 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f1aeb786-0138-11f0-9ab9-95dc52dad729 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1742000451; x=1742259651; bh=SZFLLKsmutSIFRVICzFF/MAQs1B4CsrYVYffl1QxtBM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=NHNM1BicsPZb3TvhlQSVR9p33g3RprpHhyI03sQkhm2Y1sryyKJM86wLrJ7pKpNwb y7+wx9FxYZAcIqzI49LRzCmS6iA2dCLDPhbYhdJ8CZP6DjSMQLXn+/Ect9C03zTnrV cDgq7xU0buss9BJagsGEUT39WZ0Jsb6UFfD1/WQeXujYgwbST3/Bvf1s3kv4B9/0zJ ORbEAT+jMSgy0Jg6lPoHLmA7zModKyN1AXB2qQvfjcLec4Tt6FJKjWk0Tl0BjvN4s+ kfaag8tHm3SSLOjO5l3QTBnOEahVWrVaYJzNMAY78aN8qYr+EPCdxGbVDQJouK8QxI vPUtPSu5krgVQ== Date: Sat, 15 Mar 2025 01:00:47 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH 1/3] x86/irq: rename NR_ISAIRQS to NR_ISA_IRQS Message-ID: <20250315010033.2917197-2-dmukhin@ford.com> In-Reply-To: <20250315010033.2917197-1-dmukhin@ford.com> References: <20250315010033.2917197-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: ed83c04414e86ab5a96f11c89c6df0312e8b1101 MIME-Version: 1.0 Rename NR_ISAIRQS to NR_ISA_IRQS to enhance readability. No functional changes. Signed-off-by: Denis Mukhin --- xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/vpt.c | 2 +- xen/arch/x86/include/asm/hvm/irq.h | 4 ++-- xen/arch/x86/physdev.c | 2 +- xen/drivers/passthrough/x86/hvm.c | 4 ++-- 5 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 2f31180b6f..5950f3160f 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -633,8 +633,8 @@ int hvm_domain_initialise(struct domain *d, /* Set the number of GSIs */ hvm_domain_irq(d)->nr_gsis = nr_gsis; - BUILD_BUG_ON(NR_HVM_DOMU_IRQS < NR_ISAIRQS); - ASSERT(hvm_domain_irq(d)->nr_gsis >= NR_ISAIRQS); + BUILD_BUG_ON(NR_HVM_DOMU_IRQS < NR_ISA_IRQS); + ASSERT(hvm_domain_irq(d)->nr_gsis >= NR_ISA_IRQS); /* need link to containing domain */ d->arch.hvm.pl_time->domain = d; diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c index 5e7b9a9f66..4d86830644 100644 --- a/xen/arch/x86/hvm/vpt.c +++ b/xen/arch/x86/hvm/vpt.c @@ -491,7 +491,7 @@ void create_periodic_time( uint64_t period, uint8_t irq, time_cb *cb, void *data, bool level) { if ( !pt->source || - (irq >= NR_ISAIRQS && pt->source == PTSRC_isa) || + (irq >= NR_ISA_IRQS && pt->source == PTSRC_isa) || (level && period) || (pt->source == PTSRC_ioapic ? irq >= hvm_domain_irq(v->domain)->nr_gsis : level) ) diff --git a/xen/arch/x86/include/asm/hvm/irq.h b/xen/arch/x86/include/asm/hvm/irq.h index 87e89993a4..77595fb3f4 100644 --- a/xen/arch/x86/include/asm/hvm/irq.h +++ b/xen/arch/x86/include/asm/hvm/irq.h @@ -134,7 +134,7 @@ struct hvm_girq_dpci_mapping { uint8_t machine_gsi; }; -#define NR_ISAIRQS 16 +#define NR_ISA_IRQS 16 #define NR_LINK 4 #define NR_HVM_DOMU_IRQS ARRAY_SIZE(((struct hvm_hw_vioapic *)NULL)->redirtbl) @@ -143,7 +143,7 @@ struct hvm_irq_dpci { /* Guest IRQ to guest device/intx mapping. */ struct list_head girq[NR_HVM_DOMU_IRQS]; /* Record of mapped ISA IRQs */ - DECLARE_BITMAP(isairq_map, NR_ISAIRQS); + DECLARE_BITMAP(isairq_map, NR_ISA_IRQS); /* Record of mapped Links */ uint8_t link_cnt[NR_LINK]; }; diff --git a/xen/arch/x86/physdev.c b/xen/arch/x86/physdev.c index 69fd42667c..4dfa1c0191 100644 --- a/xen/arch/x86/physdev.c +++ b/xen/arch/x86/physdev.c @@ -198,7 +198,7 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) /* if this is a level irq and count > 0, send another * notification */ - if ( gsi >= NR_ISAIRQS /* ISA irqs are edge triggered */ + if ( gsi >= NR_ISA_IRQS /* ISA irqs are edge triggered */ && hvm_irq->gsi_assert_count[gsi] ) send_guest_pirq(currd, pirq); } diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x86/hvm.c index 47de6953fd..a2ca7e0e57 100644 --- a/xen/drivers/passthrough/x86/hvm.c +++ b/xen/drivers/passthrough/x86/hvm.c @@ -958,7 +958,7 @@ static void hvm_dpci_isairq_eoi(struct domain *d, unsigned int isairq) { const struct hvm_irq_dpci *dpci = NULL; - ASSERT(isairq < NR_ISAIRQS); + ASSERT(isairq < NR_ISA_IRQS); if ( !is_iommu_enabled(d) ) return; @@ -991,7 +991,7 @@ void hvm_dpci_eoi(struct domain *d, unsigned int guest_gsi) goto unlock; } - if ( guest_gsi < NR_ISAIRQS ) + if ( guest_gsi < NR_ISA_IRQS ) { hvm_dpci_isairq_eoi(d, guest_gsi); return; From patchwork Sat Mar 15 01:00:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Mukhin X-Patchwork-Id: 14017662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4AB50C282EC for ; Sat, 15 Mar 2025 01:01:17 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.915596.1321089 (Exim 4.92) (envelope-from ) id 1ttFtb-0005am-NU; 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a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1742000455; x=1742259655; bh=VgICWf/0L3aRWRS3ZzhM6wzowwRkjjVOrPqBoDmn4Io=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=gnxBfY7RfTJ0OKgqkgwIi+Z1uGq7Jp6yx8i49P2BfEEYTS6DtLiXImXmc5JmDnxL2 aqz3aE0nakD7aRwQ4Ie8KHfSL7MhMNU9haI8c8kbp62l+Ivn8kd/E5+JI7r2jLQiZd tMolneYDqYqVx6MYF/M7ccdjg+2zvgzHA++ofOUZy/fG0HiXws1apWB+P6SzIxXIUn 72cLZCniNdNEqwRtpI3vcAUw77VyD2TZZF4YdGeZTscHZmfZ/BOzfsQPDxjtCFubKn r+t9KH3jS+x12g97IWo5JdEKn9vU+Qnyg6hTczRfHvHFmATqmrEACFfzbDvXTB4rlo SY+9Z4OMSV1bQ== Date: Sat, 15 Mar 2025 01:00:51 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH 2/3] x86/irq: use NR_ISA_IRQS instead of open-coded value Message-ID: <20250315010033.2917197-3-dmukhin@ford.com> In-Reply-To: <20250315010033.2917197-1-dmukhin@ford.com> References: <20250315010033.2917197-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: f3148e4b784f25b54c3d5b94135fb3f479f74331 MIME-Version: 1.0 Replace the open-coded value 16 with the NR_ISA_IRQS symbol to enhance readability. No functional changes. Signed-off-by: Denis Mukhin --- xen/arch/x86/hvm/dm.c | 2 +- xen/arch/x86/hvm/irq.c | 17 +++++++++-------- xen/arch/x86/hvm/vpic.c | 4 ++-- xen/arch/x86/include/asm/irq.h | 2 +- xen/arch/x86/io_apic.c | 12 ++++++------ xen/arch/x86/irq.c | 6 +++--- 6 files changed, 22 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c index a1f7a4d30a..3b53471af0 100644 --- a/xen/arch/x86/hvm/dm.c +++ b/xen/arch/x86/hvm/dm.c @@ -90,7 +90,7 @@ static int set_pci_intx_level(struct domain *d, uint16_t domain, static int set_isa_irq_level(struct domain *d, uint8_t isa_irq, uint8_t level) { - if ( isa_irq > 15 ) + if ( isa_irq >= NR_ISA_IRQS ) return -EINVAL; switch ( level ) diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c index 1eab44defc..5f64361113 100644 --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -209,7 +209,7 @@ int hvm_isa_irq_assert(struct domain *d, unsigned int isa_irq, unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); int vector = -1; - ASSERT(isa_irq <= 15); + ASSERT(isa_irq < NR_ISA_IRQS); spin_lock(&d->arch.hvm.irq_lock); @@ -231,7 +231,7 @@ void hvm_isa_irq_deassert( struct hvm_irq *hvm_irq = hvm_domain_irq(d); unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); - ASSERT(isa_irq <= 15); + ASSERT(isa_irq < NR_ISA_IRQS); spin_lock(&d->arch.hvm.irq_lock); @@ -266,12 +266,12 @@ static void hvm_set_callback_irq_level(struct vcpu *v) if ( asserted && (hvm_irq->gsi_assert_count[gsi]++ == 0) ) { vioapic_irq_positive_edge(d, gsi); - if ( gsi <= 15 ) + if ( gsi < NR_ISA_IRQS ) vpic_irq_positive_edge(d, gsi); } else if ( !asserted && (--hvm_irq->gsi_assert_count[gsi] == 0) ) { - if ( gsi <= 15 ) + if ( gsi < NR_ISA_IRQS ) vpic_irq_negative_edge(d, gsi); } break; @@ -328,7 +328,7 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) u8 old_isa_irq; int i; - if ( (link > 3) || (isa_irq > 15) ) + if ( (link > 3) || (isa_irq >= NR_ISA_IRQS) ) return -EINVAL; spin_lock(&d->arch.hvm.irq_lock); @@ -440,7 +440,8 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) { case HVMIRQ_callback_gsi: gsi = hvm_irq->callback_via.gsi; - if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && (gsi <= 15) ) + if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && + (gsi < NR_ISA_IRQS) ) vpic_irq_negative_edge(d, gsi); break; case HVMIRQ_callback_pci_intx: @@ -464,7 +465,7 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) (hvm_irq->gsi_assert_count[gsi]++ == 0) ) { vioapic_irq_positive_edge(d, gsi); - if ( gsi <= 15 ) + if ( gsi < NR_ISA_IRQS ) vpic_irq_positive_edge(d, gsi); } break; @@ -764,7 +765,7 @@ static int cf_check irq_check_link(const struct domain *d, return -EINVAL; for ( link = 0; link < ARRAY_SIZE(pci_link->route); link++ ) - if ( pci_link->route[link] > 15 ) + if ( pci_link->route[link] >= NR_ISA_IRQS ) { printk(XENLOG_G_ERR "HVM restore: PCI-ISA link %u out of range (%u)\n", diff --git a/xen/arch/x86/hvm/vpic.c b/xen/arch/x86/hvm/vpic.c index 6427b08086..22020322fb 100644 --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -523,7 +523,7 @@ void vpic_irq_positive_edge(struct domain *d, int irq) uint8_t mask = 1 << (irq & 7); ASSERT(has_vpic(d)); - ASSERT(irq <= 15); + ASSERT(irq < NR_ISA_IRQS); ASSERT(vpic_is_locked(vpic)); TRACE_TIME(TRC_HVM_EMUL_PIC_POSEDGE, irq); @@ -541,7 +541,7 @@ void vpic_irq_negative_edge(struct domain *d, int irq) uint8_t mask = 1 << (irq & 7); ASSERT(has_vpic(d)); - ASSERT(irq <= 15); + ASSERT(irq < NR_ISA_IRQS); ASSERT(vpic_is_locked(vpic)); TRACE_TIME(TRC_HVM_EMUL_PIC_NEGEDGE, irq); diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h index f9ed5dc86c..3c73073b71 100644 --- a/xen/arch/x86/include/asm/irq.h +++ b/xen/arch/x86/include/asm/irq.h @@ -108,7 +108,7 @@ extern bool opt_noirqbalance; extern int opt_irq_vector_map; -#define platform_legacy_irq(irq) ((irq) < 16) +#define platform_legacy_irq(irq) ((irq) < NR_ISA_IRQS) void cf_check event_check_interrupt(void); void cf_check invalidate_interrupt(void); diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index c6cf944811..84bd87a5e4 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -2715,15 +2715,15 @@ void __init ioapic_init(void) " than \"nr_irqs=\"\n"); max_gsi_irqs = nr_irqs; } - if ( max_gsi_irqs < 16 ) - max_gsi_irqs = 16; + if ( max_gsi_irqs < NR_ISA_IRQS ) + max_gsi_irqs = NR_ISA_IRQS; /* for PHYSDEVOP_pirq_eoi_gmfn guest assumptions */ if ( max_gsi_irqs > PAGE_SIZE * 8 ) max_gsi_irqs = PAGE_SIZE * 8; - if ( !smp_found_config || skip_ioapic_setup || nr_irqs_gsi < 16 ) - nr_irqs_gsi = 16; + if ( !smp_found_config || skip_ioapic_setup || nr_irqs_gsi < NR_ISA_IRQS ) + nr_irqs_gsi = NR_ISA_IRQS; else if ( nr_irqs_gsi > max_gsi_irqs ) { printk(XENLOG_WARNING "Limiting to %u GSI IRQs (found %u)\n", @@ -2736,8 +2736,8 @@ void __init ioapic_init(void) max(0U + num_present_cpus() * NR_DYNAMIC_VECTORS, 8 * nr_irqs_gsi) : nr_irqs_gsi; - else if ( nr_irqs < 16 ) - nr_irqs = 16; + else if ( nr_irqs < NR_ISA_IRQS ) + nr_irqs = NR_ISA_IRQS; printk(XENLOG_INFO "IRQ limits: %u GSI, %u MSI/MSI-X\n", nr_irqs_gsi, nr_irqs - nr_irqs_gsi); } diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index f35894577b..dd8d921f18 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -36,7 +36,7 @@ bool __read_mostly opt_noirqbalance; boolean_param("noirqbalance", opt_noirqbalance); -unsigned int __read_mostly nr_irqs_gsi = 16; +unsigned int __read_mostly nr_irqs_gsi = NR_ISA_IRQS; unsigned int __read_mostly nr_irqs; integer_param("nr_irqs", nr_irqs); @@ -1525,7 +1525,7 @@ void desc_guest_eoi(struct irq_desc *desc, struct pirq *pirq) int pirq_guest_unmask(struct domain *d) { unsigned int pirq = 0, n, i; - struct pirq *pirqs[16]; + struct pirq *pirqs[NR_ISA_IRQS]; do { n = radix_tree_gang_lookup(&d->pirq_tree, (void **)pirqs, pirq, @@ -2113,7 +2113,7 @@ int get_free_pirq(struct domain *d, int type) if ( type == MAP_PIRQ_TYPE_GSI ) { - for ( i = 16; i < nr_irqs_gsi; i++ ) + for ( i = NR_ISA_IRQS; i < nr_irqs_gsi; i++ ) if ( is_free_pirq(d, pirq_info(d, i)) ) { pirq_get_info(d, i); From patchwork Sat Mar 15 01:00:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis Mukhin X-Patchwork-Id: 14017659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 334B3C282EC for ; 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Sat, 15 Mar 2025 02:01:01 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f655ccaf-0138-11f0-9899-31a8f345e629 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1742000459; x=1742259659; bh=DRer+9clbTpnjbxvNyAPigTWFkAdFBrXKLnJAbMCgYA=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=R+D6o6LpjFh9sxnmTqAEL+HYMKXwWdhf90LvqyLTx4JTEqC+ges309ZStORW/CU6b TkSHZcLUsdt2Q2JN8gEBuwqE/POhU5tI7im9rVpXzuIUyjsOTftOCG+sJmGpnhFpgf P2oD9AzHlTPo00IDSwn7rY5i1wJl9RRI6iAzdZ+6xMxNCnKAa6Jzi5Aee1ajjA9KMZ w7BGrOMUpjGKMAiEbPbEXyorNQWs2hAPHfv08UKonq6dvfr/AE7QJwbUDM11tH+qnW fppaQHnSIEGj8HHgpC9+zBcbgwXbjg+ZJ8mQS1DqSx0orU0kjhTxuRB4sYOfsv4HIF nc6eNJg1iXxHA== Date: Sat, 15 Mar 2025 01:00:56 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH 3/3] x86/irq: introduce APIC_VECTOR_VALID Message-ID: <20250315010033.2917197-4-dmukhin@ford.com> In-Reply-To: <20250315010033.2917197-1-dmukhin@ford.com> References: <20250315010033.2917197-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 3906a16afa138c91d372b37b17afbb6d60d33471 MIME-Version: 1.0 Add new symbol APIC_VECTOR_VALID to replace open-coded value 16 in LAPIC and virtual LAPIC code. See: Intel SDM volume 3A Chapter "ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER" Section "Valid Interrupt Vectors" No functional change. Signed-off-by: Denis Mukhin --- xen/arch/x86/cpu/mcheck/mce_intel.c | 2 +- xen/arch/x86/hvm/vlapic.c | 10 +++++----- xen/arch/x86/include/asm/apicdef.h | 1 + 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index 07b50f8793..e8c252e03a 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -136,7 +136,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) * is required to set the same value for all threads/cores). */ if ( (val & APIC_DM_MASK) != APIC_DM_FIXED - || (val & APIC_VECTOR_MASK) > 0xf ) + || (val & APIC_VECTOR_MASK) > APIC_VECTOR_VALID ) apic_write(APIC_LVTTHMR, val); if ( (msr_content & (1ULL<<3)) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 065b2aab5b..a0f46e540c 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -123,7 +123,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) * will end up back here. Break the cycle by only injecting LVTERR * if it will succeed, and folding in RECVILL otherwise. */ - if ( (lvterr & APIC_VECTOR_MASK) >= 16 ) + if ( (lvterr & APIC_VECTOR_MASK) >= APIC_VECTOR_VALID ) inj = true; else set_bit(ilog2(APIC_ESR_RECVILL), &vlapic->hw.pending_esr); @@ -136,7 +136,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) bool vlapic_test_irq(const struct vlapic *vlapic, uint8_t vec) { - if ( unlikely(vec < 16) ) + if ( unlikely(vec < APIC_VECTOR_VALID) ) return false; if ( hvm_funcs.test_pir && @@ -150,7 +150,7 @@ void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig) { struct vcpu *target = vlapic_vcpu(vlapic); - if ( unlikely(vec < 16) ) + if ( unlikely(vec < APIC_VECTOR_VALID) ) { vlapic_error(vlapic, ilog2(APIC_ESR_RECVILL)); return; @@ -523,7 +523,7 @@ void vlapic_ipi( struct vlapic *target = vlapic_lowest_prio( vlapic_domain(vlapic), vlapic, short_hand, dest, dest_mode); - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) + if ( unlikely((icr_low & APIC_VECTOR_MASK) < APIC_VECTOR_VALID) ) vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); else if ( target ) vlapic_accept_irq(vlapic_vcpu(target), icr_low); @@ -531,7 +531,7 @@ void vlapic_ipi( } case APIC_DM_FIXED: - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) + if ( unlikely((icr_low & APIC_VECTOR_MASK) < APIC_VECTOR_VALID) ) { vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); break; diff --git a/xen/arch/x86/include/asm/apicdef.h b/xen/arch/x86/include/asm/apicdef.h index 49e29ec801..7750583481 100644 --- a/xen/arch/x86/include/asm/apicdef.h +++ b/xen/arch/x86/include/asm/apicdef.h @@ -78,6 +78,7 @@ #define APIC_DM_STARTUP 0x00600 #define APIC_DM_EXTINT 0x00700 #define APIC_VECTOR_MASK 0x000FF +#define APIC_VECTOR_VALID (16) #define APIC_ICR2 0x310 #define GET_xAPIC_DEST_FIELD(x) (((x)>>24)&0xFF) #define SET_xAPIC_DEST_FIELD(x) ((x)<<24)