From patchwork Tue Mar 18 10:57:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 14020787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6CC2EC282EC for ; Tue, 18 Mar 2025 11:06:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=EjWT0KIPG9aIQyy56GIy7I+HKIvMrUD3TmZSay3Fv0Y=; b=CKWXGWin9uoAJkYs9k5lZ2R6/i ZKTvWO6L1jCM5aKIFDIWx+ymjoAZfgz7c5Xoh4yMlZbuPyyrqdX8XUwR/EVCYOwo58AU6Ehk0D5mL LmkYGtxVVxYzHfxLom5Q+mTV4JFQs+MsMz6NzWOhJIS/MGAZOsHqS9fgftSYiJ470CCpC1y3Mbc8B MCK8/CVW8iX4pA+jaOocD04ozYljogpeuQ5yduRLVE7LeMB3PUl6QsoXtxl2x/RSeK65DWqVgyKKr dWZVWA3gMhUrFaSMwW//QqRovVXntxqMqXr3JD39UD+5Dnr0oOZCelVOWKCwdTOTOYn1slF9ZBI8L vbQ/AqLQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tuUmL-00000005e2M-0wVQ; Tue, 18 Mar 2025 11:06:37 +0000 Received: from mgamail.intel.com ([192.198.163.7]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tuUfd-00000005cbu-0bSP for linux-arm-kernel@lists.infradead.org; Tue, 18 Mar 2025 10:59:42 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1742295581; x=1773831581; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g0km+zVxRqwRAs2RLk/084gII6D1iqm+5F4kXCBIEnY=; b=nBuKzB9iQUUwPkZyYw34SkARC3FY6FxkfTMbig2QgrcJgWyG6JKmeREG dpl7ekIZM5CppB5CtX0vPF9kUdceUWkdBZpSaFm5SsrqqKBrQcaCRIgIz kJRrmXHm3H75p7rU5+gdWYcCwusmmcowCGQ/V3sgbUulWmc+DxqA/Y3Z8 2JqxULYeSsck3fdwg4rrpn3VkkzlMEWvDTjRMG3Ggdcwb8O3RwJXQ5LES GAW9NKoMIzlfc50P7W2DTzWZ45ufR+p+hKrBb8ki1dJ54QqX9FdwKmMSD PgL4BSQny1gakugJ8Uowhsw9DrN2A1d5KS5990nLcCciFZc1dbDl0OiWu w==; X-CSE-ConnectionGUID: Ix+CFYRiSuO4OKYj4bKa2A== X-CSE-MsgGUID: KGOnfKnpTXCZift6SIOK7w== X-IronPort-AV: E=McAfee;i="6700,10204,11376"; a="68781764" X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="68781764" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2025 03:59:38 -0700 X-CSE-ConnectionGUID: nhLIuPdfRqmK4abuoQlihw== X-CSE-MsgGUID: eQ4VFVtRTIqLSmNCiL8z3A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="153215697" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa001.fm.intel.com with ESMTP; 18 Mar 2025 03:59:35 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id D00F3CC; Tue, 18 Mar 2025 12:59:33 +0200 (EET) From: Andy Shevchenko To: Jacky Huang , Andy Shevchenko , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Linus Walleij , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v2 1/5] pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignment Date: Tue, 18 Mar 2025 12:57:14 +0200 Message-ID: <20250318105932.2090926-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> References: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250318_035941_206736_C138A428 X-CRM114-Status: GOOD ( 13.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Sparse is not happy about implementation of the NPCM8XX_PINCFG() pinctrl-npcm8xx.c:1314:9: warning: obsolete array initializer, use C99 syntax pinctrl-npcm8xx.c:1315:9: warning: obsolete array initializer, use C99 syntax ... pinctrl-npcm8xx.c:1412:9: warning: obsolete array initializer, use C99 syntax pinctrl-npcm8xx.c:1413:9: warning: too many warnings which uses index-based assignment in a wrong way, i.e. it missed the equal sign and hence the index is simply ignored, while the entries are indexed naturally. This is not a problem as the pin numbering repeats the natural order, but it might be in case of shuffling the entries. Fix this by adding missed equal sign and reformat a bit for better readability. Fixes: acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver") Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 17825bbe1421..f6a1e684a386 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -1290,12 +1290,14 @@ static struct npcm8xx_func npcm8xx_funcs[] = { }; #define NPCM8XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q) \ - [a] { .fn0 = fn_ ## b, .reg0 = NPCM8XX_GCR_ ## c, .bit0 = d, \ + [a] = { \ + .flag = q, \ + .fn0 = fn_ ## b, .reg0 = NPCM8XX_GCR_ ## c, .bit0 = d, \ .fn1 = fn_ ## e, .reg1 = NPCM8XX_GCR_ ## f, .bit1 = g, \ .fn2 = fn_ ## h, .reg2 = NPCM8XX_GCR_ ## i, .bit2 = j, \ .fn3 = fn_ ## k, .reg3 = NPCM8XX_GCR_ ## l, .bit3 = m, \ .fn4 = fn_ ## n, .reg4 = NPCM8XX_GCR_ ## o, .bit4 = p, \ - .flag = q } + } /* Drive strength controlled by NPCM8XX_GP_N_ODSC */ #define DRIVE_STRENGTH_LO_SHIFT 8 From patchwork Tue Mar 18 10:57:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 14020786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04A22C282EC for ; Tue, 18 Mar 2025 11:05:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xhA20a1giyygMYB5F+ic7LpD6FeCXdJlQSf/S9lVgMM=; b=d0pEH3e1XM3MMhgtKCCMok2qHh qnQDT6Rmn9rzc3F+sLd0o/fwNPWvEN2Crxa0+jRFm97XDImzFXr31aWq6Fcx6SlnHYa/ORuR5mNRs 3XwTXe/3CKe0UefSDkM17i6219+eCJ2L5La9ijGezzVhtInThdD5fTxapECswYKDV7Qlrhc9BwRiC G1GfvBUUqH21azyzhsp8hziIa+sP22/h/d/RzBUDBahMroKFRB1BMrh6m+4xl+oVqtJEVSZpiTnIz z1lPy05/FOdHpEiExBXLwBLieSSs+BgbZ895jNP06BX/XDWZar75KR2C4Dz3/20tU8+/qpC1ZE5lK cLTRKRZA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tuUkg-00000005dhz-1rh1; Tue, 18 Mar 2025 11:04:54 +0000 Received: from mgamail.intel.com ([192.198.163.7]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tuUfd-00000005caQ-0OwA for linux-arm-kernel@lists.infradead.org; Tue, 18 Mar 2025 10:59:42 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1742295581; x=1773831581; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QrndgZbN9z1XtoTGR06yFti0xSwFxjHct0FERYdF7BA=; b=HJmCs46PrlEvLzUi6AggymdPoFESx88gwSRmfVzRwzGkbLHtLamGw8OU 7oyy5jpjEURGK157JGN9n1xoKA62XDCQiFPSf/TdMnzl/VpOJkAWhYIT1 yToOT6YRLU8CASY2BY5lJaDAUhABE36snmc4fanQ7cvy8MxqpYhi96vJz BJqVcPKwgGCLPKMpy3WBflfYickE8ftnJJtAZePIpHb4ZM10WKggDbDtV pOwsx+J5efjlDy/zYKlBETP6Ix49HZ9oAKbB/DeHcxBggp+HFlfw3YJBA S6FpGudq+mvfdQCOnqHdrDH+YuGnRPrZIYO88JIA4nSW97rW3H1KA5Sxj g==; X-CSE-ConnectionGUID: /MldXe8NSX+Eo0akbskJag== X-CSE-MsgGUID: MBlJw630QqOszc24SRn6jQ== X-IronPort-AV: E=McAfee;i="6700,10204,11376"; a="68781756" X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="68781756" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2025 03:59:38 -0700 X-CSE-ConnectionGUID: epYLmD4nSv++05dKgL+RbQ== X-CSE-MsgGUID: oAb6QjutR1yMp+GHh+cTwA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="153215696" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa001.fm.intel.com with ESMTP; 18 Mar 2025 03:59:35 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id E65112E2; Tue, 18 Mar 2025 12:59:33 +0200 (EET) From: Andy Shevchenko To: Jacky Huang , Andy Shevchenko , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Linus Walleij , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v2 2/5] pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP() Date: Tue, 18 Mar 2025 12:57:15 +0200 Message-ID: <20250318105932.2090926-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> References: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250318_035941_149956_AD7BAD71 X-CRM114-Status: GOOD ( 10.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 16 ++-------------- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 16 ++-------------- 2 files changed, 4 insertions(+), 28 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 62a46d824b46..2601aacfb976 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -504,17 +504,6 @@ static const int lkgpo2_pins[] = { 9 }; static const int nprd_smi_pins[] = { 190 }; -/* - * pin: name, number - * group: name, npins, pins - * function: name, ngroups, groups - */ -struct npcm7xx_group { - const char *name; - const unsigned int *pins; - int npins; -}; - #define NPCM7XX_GRPS \ NPCM7XX_GRP(smb0), \ NPCM7XX_GRP(smb0b), \ @@ -642,9 +631,8 @@ enum { #undef NPCM7XX_GRP }; -static struct npcm7xx_group npcm7xx_groups[] = { -#define NPCM7XX_GRP(x) { .name = #x, .pins = x ## _pins, \ - .npins = ARRAY_SIZE(x ## _pins) } +static struct pingroup npcm7xx_groups[] = { +#define NPCM7XX_GRP(x) PINCTRL_PINGROUP(#x, x ## _pins, ARRAY_SIZE(x ## _pins)) NPCM7XX_GRPS #undef NPCM7XX_GRP }; diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index f6a1e684a386..eac43315a360 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -587,17 +587,6 @@ static const int hgpio5_pins[] = { 25 }; static const int hgpio6_pins[] = { 59 }; static const int hgpio7_pins[] = { 60 }; -/* - * pin: name, number - * group: name, npins, pins - * function: name, ngroups, groups - */ -struct npcm8xx_pingroup { - const char *name; - const unsigned int *pins; - int npins; -}; - #define NPCM8XX_GRPS \ NPCM8XX_GRP(gpi36), \ NPCM8XX_GRP(gpi35), \ @@ -829,9 +818,8 @@ enum { #undef NPCM8XX_GRP }; -static struct npcm8xx_pingroup npcm8xx_pingroups[] = { -#define NPCM8XX_GRP(x) { .name = #x, .pins = x ## _pins, \ - .npins = ARRAY_SIZE(x ## _pins) } +static struct pingroup npcm8xx_pingroups[] = { +#define NPCM8XX_GRP(x) PINCTRL_PINGROUP(#x, x ## _pins, ARRAY_SIZE(x ## _pins)) NPCM8XX_GRPS #undef NPCM8XX_GRP }; From patchwork Tue Mar 18 10:57:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 14020783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C144FC282EC for ; Tue, 18 Mar 2025 11:01:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1pfUlvb5zhw99ZWb0RJphObm/FvmLmvLrCf2wM6zAkw=; b=VH0LclOxHjYSsUJ6UvHUdyBXHG F7CDocqKwM1mXGyRu9i+tPW0fANPuOLbV3MRBR/31eDduCBPsxrX65VVo8iu0sFvl8STIXzyU9ObR oJoouWsoz8pA8FcWGf5KQq3w5YV+KrqsrkDHgGh0gBVmUOkOvn3M8QDV4n0gdflPPxrce9Jsnstmv dR0mY3UF05r5MuK5UralkFZm3O/CV1SAMor5WtdBeerQwQQHaORGS2O+jDXMgeP7NH95Yw1GfHBsS Aj7VpkanGcfgEKUMQmr1VEkSiwTEqZ4iO99weGsRQ/vxsBMPDHV4bVCP+6HBOJL2bGJFk3zEWaHn5 ToQBM+9Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tuUhN-00000005d0h-2FBL; Tue, 18 Mar 2025 11:01:29 +0000 Received: from mgamail.intel.com ([192.198.163.8]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tuUfb-00000005caR-2Sqr for linux-arm-kernel@lists.infradead.org; Tue, 18 Mar 2025 10:59:40 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1742295580; x=1773831580; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aXsahCvO2KYQIW3IfJ3vGR9arA9mwP0c7xLGGryhCno=; b=FaVsVSxzYd6GErET74EajAHOs7hydnVi802Q+cx9o2GTtkOXUV3VdhbS 1bPVCqrOPrzpK+PvbLOo+zlRfQIDmF98eA7dLpF7K78MP3VfWFSwH5Mbs XOAzR0gVB3/T/2LSYEvsRfq7vfaYyqHU1wi/tKub72onlGrJcGok6DmYq dVe7T73mNAq47nFyEuTU4Ca1CogTUm6fMlkx9/DZ3qjhCzicMFVVEyV6g cHad9BRGa3FyqaJPP7rLwsNZWp5gYHk7Zyt8/jolfT3sJK3uy+eKNTVld JnUDSpE260wEWU4tqu7chsLCMx3sA5HGP+walfBa65Wl4Pu+vgDrLUGub A==; X-CSE-ConnectionGUID: wOzHFfplSy6B294iDyLjDg== X-CSE-MsgGUID: QDbE5UGtQGmFuOk4nTYzcQ== X-IronPort-AV: E=McAfee;i="6700,10204,11376"; a="60959399" X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="60959399" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2025 03:59:39 -0700 X-CSE-ConnectionGUID: 7sgIk1i0SGCfXDhHYH+nLg== X-CSE-MsgGUID: ATtY5SUDR1+3aksE20WR8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="127322155" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa004.fm.intel.com with ESMTP; 18 Mar 2025 03:59:35 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 03AB32FC; Tue, 18 Mar 2025 12:59:33 +0200 (EET) From: Andy Shevchenko To: Jacky Huang , Andy Shevchenko , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Linus Walleij , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v2 3/5] pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION() Date: Tue, 18 Mar 2025 12:57:16 +0200 Message-ID: <20250318105932.2090926-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> References: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250318_035939_643931_63ED273D X-CRM114-Status: GOOD ( 15.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since pin control provides a generic data type and a macro for the pin function definition, use them in the driver. Reviewed-by: Jonathan Neuschäfer Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 19 ++++++++----------- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 11 +++-------- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 11 +++-------- drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 11 +++-------- 4 files changed, 17 insertions(+), 35 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index 59c4e7c6cdde..ad4f9ca414c8 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -98,12 +98,6 @@ static const u32 ds_3300mv_tbl[] = { 17100, 25600, 34100, 42800, 48000, 56000, 77000, 82000, }; -struct ma35_pin_func { - const char *name; - const char **groups; - u32 ngroups; -}; - struct ma35_pin_setting { u32 offset; u32 shift; @@ -149,7 +143,7 @@ struct ma35_pinctrl { struct regmap *regmap; struct ma35_pin_group *groups; unsigned int ngroups; - struct ma35_pin_func *functions; + struct pinfunction *functions; unsigned int nfunctions; }; @@ -1041,9 +1035,10 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc u32 index) { struct device_node *child; - struct ma35_pin_func *func; + struct pinfunction *func; struct ma35_pin_group *grp; static u32 grp_index; + const char **groups; u32 ret, i = 0; dev_dbg(npctl->dev, "parse function(%d): %s\n", index, np->name); @@ -1055,12 +1050,12 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc if (func->ngroups <= 0) return 0; - func->groups = devm_kcalloc(npctl->dev, func->ngroups, sizeof(char *), GFP_KERNEL); - if (!func->groups) + groups = devm_kcalloc(npctl->dev, func->ngroups, sizeof(*groups), GFP_KERNEL); + if (!groups) return -ENOMEM; for_each_child_of_node(np, child) { - func->groups[i] = child->name; + groups[i] = child->name; grp = &npctl->groups[grp_index++]; ret = ma35_pinctrl_parse_groups(child, grp, npctl, i++); if (ret) { @@ -1068,6 +1063,8 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc return ret; } } + + func->groups = groups; return 0; } diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 2601aacfb976..c6b11a198c76 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -639,13 +639,6 @@ static struct pingroup npcm7xx_groups[] = { #define NPCM7XX_SFUNC(a) NPCM7XX_FUNC(a, #a) #define NPCM7XX_FUNC(a, b...) static const char *a ## _grp[] = { b } -#define NPCM7XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ - .groups = nm ## _grp } -struct npcm7xx_func { - const char *name; - const unsigned int ngroups; - const char *const *groups; -}; NPCM7XX_SFUNC(smb0); NPCM7XX_SFUNC(smb0b); @@ -764,7 +757,8 @@ NPCM7XX_SFUNC(lkgpo2); NPCM7XX_SFUNC(nprd_smi); /* Function names */ -static struct npcm7xx_func npcm7xx_funcs[] = { +static struct pinfunction npcm7xx_funcs[] = { +#define NPCM7XX_MKFUNC(nm) PINCTRL_PINFUNCTION(#nm, nm ## _grp, ARRAY_SIZE(nm ## _grp)) NPCM7XX_MKFUNC(smb0), NPCM7XX_MKFUNC(smb0b), NPCM7XX_MKFUNC(smb0c), @@ -880,6 +874,7 @@ static struct npcm7xx_func npcm7xx_funcs[] = { NPCM7XX_MKFUNC(lkgpo1), NPCM7XX_MKFUNC(lkgpo2), NPCM7XX_MKFUNC(nprd_smi), +#undef NPCM7XX_MKFUNC }; #define NPCM7XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k) \ diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index eac43315a360..62347a82282d 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -826,13 +826,6 @@ static struct pingroup npcm8xx_pingroups[] = { #define NPCM8XX_SFUNC(a) NPCM8XX_FUNC(a, #a) #define NPCM8XX_FUNC(a, b...) static const char *a ## _grp[] = { b } -#define NPCM8XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ - .groups = nm ## _grp } -struct npcm8xx_func { - const char *name; - const unsigned int ngroups; - const char *const *groups; -}; NPCM8XX_SFUNC(gpi36); NPCM8XX_SFUNC(gpi35); @@ -1055,7 +1048,8 @@ NPCM8XX_SFUNC(hgpio6); NPCM8XX_SFUNC(hgpio7); /* Function names */ -static struct npcm8xx_func npcm8xx_funcs[] = { +static struct pinfunction npcm8xx_funcs[] = { +#define NPCM8XX_MKFUNC(nm) PINCTRL_PINFUNCTION(#nm, nm ## _grp, ARRAY_SIZE(nm ## _grp)) NPCM8XX_MKFUNC(gpi36), NPCM8XX_MKFUNC(gpi35), NPCM8XX_MKFUNC(tp_jtag3), @@ -1275,6 +1269,7 @@ static struct npcm8xx_func npcm8xx_funcs[] = { NPCM8XX_MKFUNC(hgpio5), NPCM8XX_MKFUNC(hgpio6), NPCM8XX_MKFUNC(hgpio7), +#undef NPCM8XX_MKFUNC }; #define NPCM8XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q) \ diff --git a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c index 2f97accef837..4264ca749175 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c +++ b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c @@ -482,13 +482,6 @@ static const struct pingroup wpcm450_groups[] = { #define WPCM450_SFUNC(a) WPCM450_FUNC(a, #a) #define WPCM450_FUNC(a, b...) static const char *a ## _grp[] = { b } -#define WPCM450_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ - .groups = nm ## _grp } -struct wpcm450_func { - const char *name; - const unsigned int ngroups; - const char *const *groups; -}; WPCM450_SFUNC(smb3); WPCM450_SFUNC(smb4); @@ -555,7 +548,8 @@ WPCM450_FUNC(gpio, WPCM450_GRPS); #undef WPCM450_GRP /* Function names */ -static struct wpcm450_func wpcm450_funcs[] = { +static struct pinfunction wpcm450_funcs[] = { +#define WPCM450_MKFUNC(nm) PINCTRL_PINFUNCTION(#nm, nm ## _grp, ARRAY_SIZE(nm ## _grp)) WPCM450_MKFUNC(smb3), WPCM450_MKFUNC(smb4), WPCM450_MKFUNC(smb5), @@ -616,6 +610,7 @@ static struct wpcm450_func wpcm450_funcs[] = { WPCM450_MKFUNC(hg6), WPCM450_MKFUNC(hg7), WPCM450_MKFUNC(gpio), +#undef WPCM450_MKFUNC }; #define WPCM450_PINCFG(a, b, c, d, e, f, g) \ From patchwork Tue Mar 18 10:57:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 14020785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92F63C282EC for ; Tue, 18 Mar 2025 11:03:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=7qSUr+pm3pdnbRsIh3hdQcHybpcWSk9Cg64DpmHfrRQ=; b=fXiuU+4KQFfE8MFMvaCUe8tuNS i3LUbprdJrFAspxVemnAQGpZjuvA97ooknjNeFqauYyt/ZceOuVUQAAFY8WbAnofu4LBiwtU2Q8e0 Ju1LJfkuG8R8yvMdQ6dpMz6vzKaE0eEB1JGsJMzjTQ2JtC10OpOK6DE/8JH8GMctHQWJm2gTG+avO JZ8ocyrdvkaisOHG3sDfZrRxAyAJ4LtWr91shBhMIWM2HaccBF5IISRl9AB/m7jUFHhv0ARJRNmdd aY0CRVtxoYtqoA0nQlKZBjzRV7rAZSFMlVfvj2yuONSaayTtBs5vGp73+ssLiO9GZgjJYi6A9pgAp y1o08qRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tuUj1-00000005dPb-2sjB; Tue, 18 Mar 2025 11:03:11 +0000 Received: from mgamail.intel.com ([192.198.163.7]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tuUfb-00000005caQ-2XPx for linux-arm-kernel@lists.infradead.org; Tue, 18 Mar 2025 10:59:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1742295579; x=1773831579; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K4Qh71+6FN2E5vhhDAN+lN9a5M2tg0WGTdBTyy5owTw=; b=cKflEbkIMcvQZsK8bz/bNAKxlbEtJJ0A/xJnxE+A4UX0V6qZLUj56/v2 tAJdcejLt3ntHWMTeHd4mLL+LXyiaebC4eGzYgzgNuF4+u2kUTIJJQb9h ckfinVHoY80gSO6Qkbf6SklDKa9462SfWNYSc2AyBRpWwtumExjdZvkcl 7wOcUNs2Tq1b/Unv4PAcBjyaNQfaxAnPA8r8RuEGMQEqcc8GyjfRIGv1C rE3NoCOtZ2z8CQgeeSeW7EYr+kdfyxTzt4lHuknnNTFEgTPhMzM2/mezV 7A95vLn046KnYZqKOczEB4iTtJ5VbuiNHhfUHGHS9fkuNOtRGyGduu1gm A==; X-CSE-ConnectionGUID: iLhv7NDBQ5OIYoY3EuenNg== X-CSE-MsgGUID: 5ov7RuUJT26S6FRxJn6cfA== X-IronPort-AV: E=McAfee;i="6700,10204,11376"; a="68781751" X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="68781751" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2025 03:59:38 -0700 X-CSE-ConnectionGUID: 9KcpTX+ET7aels/yNDL6uw== X-CSE-MsgGUID: TcQmfDf+TDiUMxf/WRhAPQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="153215699" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa001.fm.intel.com with ESMTP; 18 Mar 2025 03:59:35 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1026A5DC; Tue, 18 Mar 2025 12:59:34 +0200 (EET) From: Andy Shevchenko To: Jacky Huang , Andy Shevchenko , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Linus Walleij , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v2 4/5] pinctrl: nuvoton: Convert to use struct group_desc Date: Tue, 18 Mar 2025 12:57:17 +0200 Message-ID: <20250318105932.2090926-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> References: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250318_035939_652585_8EEAB361 X-CRM114-Status: GOOD ( 17.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The pin control core header provides struct group_desc. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 70 ++++++++++++-------------- 1 file changed, 33 insertions(+), 37 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index ad4f9ca414c8..da3c8d8e3eb3 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -106,13 +106,6 @@ struct ma35_pin_setting { unsigned int nconfigs; }; -struct ma35_pin_group { - const char *name; - unsigned int npins; - unsigned int *pins; - struct ma35_pin_setting *settings; -}; - struct ma35_pin_bank { void __iomem *reg_base; struct clk *clk; @@ -141,7 +134,7 @@ struct ma35_pinctrl { struct pinctrl_dev *pctl; const struct ma35_pinctrl_soc_info *info; struct regmap *regmap; - struct ma35_pin_group *groups; + struct group_desc *groups; unsigned int ngroups; struct pinfunction *functions; unsigned int nfunctions; @@ -160,7 +153,7 @@ static const char *ma35_get_group_name(struct pinctrl_dev *pctldev, unsigned int { struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev); - return npctl->groups[selector].name; + return npctl->groups[selector].grp.name; } static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, @@ -171,19 +164,19 @@ static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selecto if (selector >= npctl->ngroups) return -EINVAL; - *pins = npctl->groups[selector].pins; - *npins = npctl->groups[selector].npins; + *pins = npctl->groups[selector].grp.pins; + *npins = npctl->groups[selector].grp.npins; return 0; } -static struct ma35_pin_group *ma35_pinctrl_find_group_by_name( - const struct ma35_pinctrl *npctl, const char *name) +static struct group_desc * +ma35_pinctrl_find_group_by_name(const struct ma35_pinctrl *npctl, const char *name) { int i; for (i = 0; i < npctl->ngroups; i++) { - if (!strcmp(npctl->groups[i].name, name)) + if (!strcmp(npctl->groups[i].grp.name, name)) return &npctl->groups[i]; } return NULL; @@ -195,9 +188,10 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev, unsigned int *num_maps) { struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev); - struct ma35_pin_group *grp; + struct ma35_pin_setting *setting; struct pinctrl_map *new_map; struct device_node *parent; + struct group_desc *grp; int map_num = 1; int i; @@ -211,7 +205,7 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev, return -EINVAL; } - map_num += grp->npins; + map_num += grp->grp.npins; new_map = kcalloc(map_num, sizeof(*new_map), GFP_KERNEL); if (!new_map) return -ENOMEM; @@ -223,17 +217,19 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev, if (!parent) return -EINVAL; + setting = grp->data; + new_map[0].type = PIN_MAP_TYPE_MUX_GROUP; new_map[0].data.mux.function = parent->name; new_map[0].data.mux.group = np->name; of_node_put(parent); new_map++; - for (i = 0; i < grp->npins; i++) { + for (i = 0; i < grp->grp.npins; i++) { new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN; - new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->pins[i]); - new_map[i].data.configs.configs = grp->settings[i].configs; - new_map[i].data.configs.num_configs = grp->settings[i].nconfigs; + new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->grp.pins[i]); + new_map[i].data.configs.configs = setting[i].configs; + new_map[i].data.configs.num_configs = setting[i].nconfigs; } dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n", (*map)->data.mux.function, (*map)->data.mux.group, map_num); @@ -281,14 +277,14 @@ static int ma35_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selecto unsigned int group) { struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev); - struct ma35_pin_group *grp = &npctl->groups[group]; - struct ma35_pin_setting *setting = grp->settings; + struct group_desc *grp = &npctl->groups[group]; + struct ma35_pin_setting *setting = grp->data; u32 i, regval; dev_dbg(npctl->dev, "enable function %s group %s\n", - npctl->functions[selector].name, npctl->groups[group].name); + npctl->functions[selector].name, grp->grp.name); - for (i = 0; i < grp->npins; i++) { + for (i = 0; i < grp->grp.npins; i++) { regmap_read(npctl->regmap, setting->offset, ®val); regval &= ~GENMASK(setting->shift + MA35_MFP_BITS_PER_PORT - 1, setting->shift); @@ -980,17 +976,16 @@ static const struct pinconf_ops ma35_pinconf_ops = { .is_generic = true, }; -static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_group *grp, +static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc *grp, struct ma35_pinctrl *npctl, u32 index) { struct ma35_pin_setting *pin; unsigned long *configs; unsigned int nconfigs; + unsigned int *pins; int i, j, count, ret; u32 *elems; - grp->name = np->name; - ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &nconfigs); if (ret) return ret; @@ -1003,21 +998,22 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro if (!elems) return -ENOMEM; + grp->grp.name = np->name; + ret = of_property_read_u32_array(np, "nuvoton,pins", elems, count); if (ret) return -EINVAL; + grp->grp.npins = count / 3; - grp->npins = count / 3; - - grp->pins = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL); - if (!grp->pins) + pins = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pins), GFP_KERNEL); + if (!pins) return -ENOMEM; + grp->grp.pins = pins; - grp->settings = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->settings), GFP_KERNEL); - if (!grp->settings) + pin = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pin), GFP_KERNEL); + if (!pin) return -ENOMEM; - - pin = grp->settings; + grp->data = pin; for (i = 0, j = 0; i < count; i += 3, j++) { pin->offset = elems[i] * MA35_MFP_REG_SZ_PER_BANK + MA35_MFP_REG_BASE; @@ -1025,7 +1021,7 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro pin->muxval = elems[i + 2]; pin->configs = configs; pin->nconfigs = nconfigs; - grp->pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift); + pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift); pin++; } return 0; @@ -1036,7 +1032,7 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc { struct device_node *child; struct pinfunction *func; - struct ma35_pin_group *grp; + struct group_desc *grp; static u32 grp_index; const char **groups; u32 ret, i = 0; From patchwork Tue Mar 18 10:57:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 14020793 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0531C282EC for ; Tue, 18 Mar 2025 11:10:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=s5hNx8qq5WA/xVIcpPPa9ZGARxESCv+eSzVs6P0/78M=; b=Jy5KAmbHUzUPaEZz0JxxFaSF/p BEI+CXtDn5UymYJxF2YxOK2lt4zTkguNbxaLzlucbSTkNJAHqPyQI66UDiFWZDsVeNXx947i0bJd4 kq9OmgqIHaIIUOcPyjkyfMXqFBlQB49WsRIQ2qTUrH4hFSqJceKdyBxefBXbAE0hNT1LSMiOoAU7r l3vQs24GjbtviAl7ksqWb517BUfTYVRE+Asop67PKT8M15CU4xEY9QreTMvyd970gx7QgrdVbYwW+ +L2vFjj4zsNenFceN7BrFe8usrE5ZKac5Y0F4KuzVtp4LQsYPg4BR8LOUvW0zCSX0U3QgAd2gsqSz tt8TRzpA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tuUpf-00000005ehm-3K3B; Tue, 18 Mar 2025 11:10:03 +0000 Received: from mgamail.intel.com ([192.198.163.8]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tuUff-00000005caR-14Vg for linux-arm-kernel@lists.infradead.org; Tue, 18 Mar 2025 10:59:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1742295583; x=1773831583; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=asp1AUmFkOlCpbFyxMT3/Whk2zXRSNCtJDEO+Z5wvBY=; b=CVaKu8vK4d/nqJyf5p5JKNazjDbpjD5DWQ3y3G+02tUNSR9FUwMJT4B/ 9Fzw8W87ZI7yUvxn0ey1hLahT7Au2x+cHMBsAzoDAoPI+z15HS67UcFay nQC+m5jXRqzV9g336VnFmz3InETjoZzHsKl9Bk02biTFIMGZ/CZsUKueb CaNL0BSOD96oVGUUS6HKbAeHta9uAh318ARb3mmghjHU1n4oBcHYkM1Nl YvTa2WiiBGMMWUjjpyhUZveGBwniLQ5118wz6YhMvh10Yyew7QqjtYf1s UdG9nVKs7viecEwbfs6SW0N47HKMGRETDvM6KrUm25jHkMIJ1t8dO/z5N A==; X-CSE-ConnectionGUID: 2RyxErJ1S06rLNz01LY1tg== X-CSE-MsgGUID: ZuMwDWKMRkim/iF9x1Dpww== X-IronPort-AV: E=McAfee;i="6700,10204,11376"; a="60959409" X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="60959409" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2025 03:59:43 -0700 X-CSE-ConnectionGUID: dZKgkuFdQiKlfkKYVgnWMQ== X-CSE-MsgGUID: XKUdbCKMQt+20wsV5rwcfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,256,1736841600"; d="scan'208";a="127322164" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa004.fm.intel.com with ESMTP; 18 Mar 2025 03:59:39 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1D2EA677; Tue, 18 Mar 2025 12:59:34 +0200 (EET) From: Andy Shevchenko To: Jacky Huang , Andy Shevchenko , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Linus Walleij , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v2 5/5] pinctrl: nuvoton: Reduce use of OF-specific APIs Date: Tue, 18 Mar 2025 12:57:18 +0200 Message-ID: <20250318105932.2090926-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> References: <20250318105932.2090926-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250318_035943_316145_9494143C X-CRM114-Status: GOOD ( 19.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Andy Shevchenko Some drivers are using device property APIs along with OF-specific ones. At the same time few of the latter can be converted to device property calls. Reduce use of OF-specific APIs in order to bring a bit more consistency into the drivers. Signed-off-by: Andy Shevchenko Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 35 +++++++++++------------ drivers/pinctrl/nuvoton/pinctrl-ma35d1.c | 1 - drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 17 ++--------- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 2 +- 4 files changed, 21 insertions(+), 34 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index da3c8d8e3eb3..06ae1fe8b8c5 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -519,7 +519,6 @@ static int ma35_gpiolib_register(struct platform_device *pdev, struct ma35_pinct bank->irqtype = 0; bank->irqinten = 0; bank->chip.label = bank->name; - bank->chip.of_gpio_n_cells = 2; bank->chip.parent = &pdev->dev; bank->chip.request = ma35_gpio_core_to_request; bank->chip.direction_input = ma35_gpio_core_direction_in; @@ -976,9 +975,10 @@ static const struct pinconf_ops ma35_pinconf_ops = { .is_generic = true, }; -static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc *grp, +static int ma35_pinctrl_parse_groups(struct fwnode_handle *fwnode, struct group_desc *grp, struct ma35_pinctrl *npctl, u32 index) { + struct device_node *np = to_of_node(fwnode); struct ma35_pin_setting *pin; unsigned long *configs; unsigned int nconfigs; @@ -990,7 +990,7 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc * if (ret) return ret; - count = of_property_count_elems_of_size(np, "nuvoton,pins", sizeof(u32)); + count = fwnode_property_count_u32(fwnode, "nuvoton,pins"); if (!count || count % 3) return -EINVAL; @@ -1000,7 +1000,7 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc * grp->grp.name = np->name; - ret = of_property_read_u32_array(np, "nuvoton,pins", elems, count); + ret = fwnode_property_read_u32_array(fwnode, "nuvoton,pins", elems, count); if (ret) return -EINVAL; grp->grp.npins = count / 3; @@ -1027,10 +1027,11 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc * return 0; } -static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinctrl *npctl, +static int ma35_pinctrl_parse_functions(struct fwnode_handle *fwnode, struct ma35_pinctrl *npctl, u32 index) { - struct device_node *child; + struct device_node *np = to_of_node(fwnode); + struct fwnode_handle *child; struct pinfunction *func; struct group_desc *grp; static u32 grp_index; @@ -1050,12 +1051,14 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc if (!groups) return -ENOMEM; - for_each_child_of_node(np, child) { - groups[i] = child->name; + fwnode_for_each_child_node(fwnode, child) { + struct device_node *node = to_of_node(child); + + groups[i] = node->name; grp = &npctl->groups[grp_index++]; ret = ma35_pinctrl_parse_groups(child, grp, npctl, i++); if (ret) { - of_node_put(child); + fwnode_handle_put(child); return ret; } } @@ -1066,13 +1069,12 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc static int ma35_pinctrl_probe_dt(struct platform_device *pdev, struct ma35_pinctrl *npctl) { + struct device *dev = &pdev->dev; struct fwnode_handle *child; u32 idx = 0; int ret; - device_for_each_child_node(&pdev->dev, child) { - if (fwnode_property_present(child, "gpio-controller")) - continue; + for_each_gpiochip_node(dev, child) { npctl->nfunctions++; npctl->ngroups += of_get_child_count(to_of_node(child)); } @@ -1090,11 +1092,8 @@ static int ma35_pinctrl_probe_dt(struct platform_device *pdev, struct ma35_pinct if (!npctl->groups) return -ENOMEM; - device_for_each_child_node(&pdev->dev, child) { - if (fwnode_property_present(child, "gpio-controller")) - continue; - - ret = ma35_pinctrl_parse_functions(to_of_node(child), npctl, idx++); + for_each_gpiochip_node(dev, child) { + ret = ma35_pinctrl_parse_functions(child, npctl, idx++); if (ret) { fwnode_handle_put(child); dev_err(&pdev->dev, "failed to parse function\n"); @@ -1139,7 +1138,7 @@ int ma35_pinctrl_probe(struct platform_device *pdev, const struct ma35_pinctrl_s npctl->info = info; npctl->dev = &pdev->dev; - npctl->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "nuvoton,sys"); + npctl->regmap = syscon_regmap_lookup_by_phandle(dev_of_node(dev), "nuvoton,sys"); if (IS_ERR(npctl->regmap)) return dev_err_probe(&pdev->dev, PTR_ERR(npctl->regmap), "No syscfg phandle specified\n"); diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c b/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c index 8bb9a5a35954..eafa06ca0879 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index c6b11a198c76..dfd32feb3428 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -7,10 +7,8 @@ #include #include #include +#include #include -#include -#include -#include #include #include #include @@ -1832,22 +1830,13 @@ static struct pinctrl_desc npcm7xx_pinctrl_desc = { static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) { int ret = -ENXIO; - struct resource res; struct device *dev = pctrl->dev; struct fwnode_reference_args args; struct fwnode_handle *child; int id = 0; for_each_gpiochip_node(dev, child) { - struct device_node *np = to_of_node(child); - - ret = of_address_to_resource(np, 0, &res); - if (ret < 0) { - dev_err(dev, "Resource fail for GPIO bank %u\n", id); - return ret; - } - - pctrl->gpio_bank[id].base = ioremap(res.start, resource_size(&res)); + pctrl->gpio_bank[id].base = fwnode_iomap(child, 0); if (!pctrl->gpio_bank[id].base) return -EINVAL; @@ -1869,7 +1858,7 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) return ret; } - ret = irq_of_parse_and_map(np, 0); + ret = fwnode_irq_get(child, 0); if (!ret) { dev_err(dev, "No IRQ for GPIO bank %u\n", id); return -EINVAL; diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 62347a82282d..be3db8ab406c 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -2424,7 +2424,7 @@ static int npcm8xx_pinctrl_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pctrl); pctrl->gcr_regmap = - syscon_regmap_lookup_by_phandle(dev->of_node, "nuvoton,sysgcr"); + syscon_regmap_lookup_by_phandle(dev_of_node(dev), "nuvoton,sysgcr"); if (IS_ERR(pctrl->gcr_regmap)) return dev_err_probe(dev, PTR_ERR(pctrl->gcr_regmap), "Failed to find nuvoton,sysgcr property\n");