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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Mar 2025 07:33:08.1139 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4e143114-78c6-490d-4388-08dd6d019eb5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8216 When vpci fails to initialize a capability of a device, it just return error instead of catching and processing exception. That makes the entire device unusable. So, refactor REGISTER_VPCI_INIT to contain more capability specific information, and try to hide capability when initialization fails in vpci_assign_device(). What's more, change the definition of init_header() since it is not a capability and it is needed for all devices' PCI config space. Signed-off-by: Jiqian Chen --- Hi all, This patch aims to hide a capability when its initialization fails. That causes we can't rely on vpci_deassign_device() to clean up assigned resources, so, following two patches clean up resources in the failure path of init function. Best regards, Jiqian Chen. --- xen/drivers/vpci/header.c | 3 +- xen/drivers/vpci/msi.c | 2 +- xen/drivers/vpci/msix.c | 2 +- xen/drivers/vpci/rebar.c | 2 +- xen/drivers/vpci/vpci.c | 65 +++++++++++++++++++++++++++++++++------ xen/include/xen/vpci.h | 27 ++++++++++++---- 6 files changed, 81 insertions(+), 20 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index ef6c965c081c..8c8e4ac5698a 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -745,7 +745,7 @@ static int bar_add_rangeset(const struct pci_dev *pdev, struct vpci_bar *bar, return !bar->mem ? -ENOMEM : 0; } -static int cf_check init_header(struct pci_dev *pdev) +int vpci_init_header(struct pci_dev *pdev) { uint16_t cmd; uint64_t addr, size; @@ -1007,7 +1007,6 @@ static int cf_check init_header(struct pci_dev *pdev) pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); return rc; } -REGISTER_VPCI_INIT(init_header, VPCI_PRIORITY_MIDDLE); /* * Local variables: diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index 66e5a8a116be..9d7a9fd8dba1 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -270,7 +270,7 @@ static int cf_check init_msi(struct pci_dev *pdev) return 0; } -REGISTER_VPCI_INIT(init_msi, VPCI_PRIORITY_LOW); +REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi, VPCI_PRIORITY_LOW); void vpci_dump_msi(void) { diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 6bd8c55bb48e..50e5f38c1e09 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -753,7 +753,7 @@ static int cf_check init_msix(struct pci_dev *pdev) return 0; } -REGISTER_VPCI_INIT(init_msix, VPCI_PRIORITY_HIGH); +REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSIX, init_msix, VPCI_PRIORITY_HIGH); /* * Local variables: diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c index 793937449af7..7c53ee031887 100644 --- a/xen/drivers/vpci/rebar.c +++ b/xen/drivers/vpci/rebar.c @@ -118,7 +118,7 @@ static int cf_check init_rebar(struct pci_dev *pdev) return 0; } -REGISTER_VPCI_INIT(init_rebar, VPCI_PRIORITY_LOW); +REGISTER_VPCI_EXTEND_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar, VPCI_PRIORITY_LOW); /* * Local variables: diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 1e6aa5d799b9..a8362e46e097 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -36,8 +36,8 @@ struct vpci_register { }; #ifdef __XEN__ -extern vpci_register_init_t *const __start_vpci_array[]; -extern vpci_register_init_t *const __end_vpci_array[]; +extern vpci_capability_t *const __start_vpci_array[]; +extern vpci_capability_t *const __end_vpci_array[]; #define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array) #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT @@ -83,6 +83,47 @@ static int assign_virtual_sbdf(struct pci_dev *pdev) #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */ +static int vpci_init_cap_with_priority(struct pci_dev *pdev, + const char *priority) +{ + for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ ) + { + const vpci_capability_t *capability = __start_vpci_array[i]; + const unsigned int cap_id = capability->id; + unsigned int pos; + int rc; + + if ( *(capability->priority) != *priority ) + continue; + + if ( !capability->is_ext ) + pos = pci_find_cap_offset(pdev->sbdf, cap_id); + else + pos = pci_find_ext_capability(pdev->sbdf, cap_id); + + if ( !pos ) + continue; + + rc = capability->init(pdev); + + if ( rc ) + { + printk(XENLOG_WARNING "%pd %pp: cap init fail rc=%d, try to hide\n", + pdev->domain, &pdev->sbdf, rc); + rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, + pos, capability->is_ext ? 4 : 1, NULL); + if ( rc ) + { + printk(XENLOG_ERR "%pd %pp: fail to hide cap rc=%d\n", + pdev->domain, &pdev->sbdf, rc); + return rc; + } + } + } + + return 0; +} + void vpci_deassign_device(struct pci_dev *pdev) { unsigned int i; @@ -128,7 +169,6 @@ void vpci_deassign_device(struct pci_dev *pdev) int vpci_assign_device(struct pci_dev *pdev) { - unsigned int i; const unsigned long *ro_map; int rc = 0; @@ -159,12 +199,19 @@ int vpci_assign_device(struct pci_dev *pdev) goto out; #endif - for ( i = 0; i < NUM_VPCI_INIT; i++ ) - { - rc = __start_vpci_array[i](pdev); - if ( rc ) - break; - } + /* + * Capabilities with high priority like MSI-X need to + * be initialized before header + */ + rc = vpci_init_cap_with_priority(pdev, VPCI_PRIORITY_HIGH); + if ( rc ) + goto out; + + rc = vpci_init_header(pdev); + if ( rc ) + goto out; + + rc = vpci_init_cap_with_priority(pdev, VPCI_PRIORITY_LOW); out: __maybe_unused; if ( rc ) diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index 807401b2eaa2..fa13397ae409 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -13,12 +13,16 @@ typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg, typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data); -typedef int vpci_register_init_t(struct pci_dev *dev); - #define VPCI_PRIORITY_HIGH "1" -#define VPCI_PRIORITY_MIDDLE "5" #define VPCI_PRIORITY_LOW "9" +typedef struct { + unsigned int id; + const char *priority; + bool is_ext; + int (*init)(struct pci_dev *pdev); +} vpci_capability_t; + #define VPCI_ECAM_BDF(addr) (((addr) & 0x0ffff000) >> 12) /* @@ -29,9 +33,20 @@ typedef int vpci_register_init_t(struct pci_dev *dev); */ #define VPCI_MAX_VIRT_DEV (PCI_SLOT(~0) + 1) -#define REGISTER_VPCI_INIT(x, p) \ - static vpci_register_init_t *const x##_entry \ - __used_section(".data.vpci." p) = (x) +#define REGISTER_VPCI_CAP(cap, x, p, ext) \ + static vpci_capability_t x##_t = { \ + .id = (cap), \ + .init = (x), \ + .priority = (p), \ + .is_ext = (ext), \ + }; \ + static vpci_capability_t *const x##_entry \ + __used_section(".data.vpci." p) = &(x##_t) + +#define REGISTER_VPCI_LEGACY_CAP(cap, x, p) REGISTER_VPCI_CAP(cap, x, p, false) +#define REGISTER_VPCI_EXTEND_CAP(cap, x, p) REGISTER_VPCI_CAP(cap, x, p, true) + +int __must_check vpci_init_header(struct pci_dev *pdev); /* Assign vPCI to device by adding handlers. */ int __must_check vpci_assign_device(struct pci_dev *pdev); From patchwork Thu Mar 27 07:32:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 14030821 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50940C3600C for ; Thu, 27 Mar 2025 07:33:43 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.928503.1331197 (Exim 4.92) (envelope-from ) id 1txhjq-0000MU-UF; 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pr=C From: Jiqian Chen To: CC: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Huang Rui , Jiqian Chen Subject: [PATCH v1 2/3] vpci/rebar: Remove registers when init_rebar() fails Date: Thu, 27 Mar 2025 15:32:13 +0800 Message-ID: <20250327073214.158210-2-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250327073214.158210-1-Jiqian.Chen@amd.com> References: <20250327073214.158210-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468D:EE_|CH2PR12MB9458:EE_ X-MS-Office365-Filtering-Correlation-Id: 81015b23-9dec-479c-a2f8-08dd6d019f90 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|82310400026|376014; X-Microsoft-Antispam-Message-Info: FU0YmON7BM0IpiQoghMKL9ySxL93wS6Oi65SHPz/QVx93SN1eukjyb0ysY6BnqPrZzkY92X+BCefF8LwDZJmx2vIfCMAvbOPVpQxLyYmhjtsqkbn6EWbgiSSSXC3YCQMxoC8NFsY9bNcj+Sh34o5RMRwUSEZ+2pkx/9uZ/hB+ix0ts15AUPlJScObFOZYf7bFm50RnqTXU8dtzVCAA4J+sVpYUgYcMNdB8omLUUi1Y5ygel0uR5VfaFY3E7LrvS3pbK8oMiXKRuMRVporLvCo/MTrhd7rIdQyKd5yLx9F6Rj2wjIdPsC3TOqF+WaMt1/n2qt1gjHIoi4alEkK7FByxiATe91okEBRozhdP2M9sZEqMm5LMOoeTmOAt9Dq6KbOGODPWf4nTgVXWS6pbrZFmPVXE5inlYksUsm4hEKux7G//EYnOPAwZxaS4mUlh6rIRagWTdb3mMHqj6/S8Mo0dXwhclLdqfAXThFGnHaU7uywJy0DieU3CUV+KiuZ5XtJ3Tj/OhIUVGom6zx7+PxEFfVoGLc+xCweM1nH+GbbmOXtn7z/+c/pWt5vbBk600AY+rJNQHh5z9qaAi3w5SVDpZdLmEKvDIh8xcmL61c/RU+qNTnmX/KK1i64q0Knrtv5C9jBcHUUa87EEr9g6uRYib/EQw6qg+wvbiBZrstASK9YY02qVyrCpTccLxZ+ujEc1aBjorjbfTSGQB9E7t2YQI3ZNA23rxoCGWveMHvlkoHaN6IkpfRD9ufVWxQj5O7l3UXb3jCnVV1cjc38PQUYPDamrjiMzpuBvwUmFYZ49BkpRPSCyQpDivtmOt4JIihAKF8MIDnyc1xTs98HUJvlRM2OaGVdgKEoK7zkFotZaCrsYyILJWPNGs9mIqQwvBbVYxiYwJdepC+Rg49QbqBbH/bU4Wh4T1KlaZpWldM3dm0hTiaATzfRyj6P3Nc6mn7988zKSnN51QZsarPcpK/6WPC+AsSjJDy2UvLtuYGls+H160IHyueMOT52D9QOmlAWH3CDPuwjVdoMCf/FArw1cpepr7SoH9raAbqPhj29imQckxrTT8Vh/O2OZXC0iGnEzi/TnlzS/u/WWDz5t8hy/nY4W1tHDNhpqkPNkSvYueAoktrWngJ/8jLKuOx/1poofyI/XTf0SjXASLoGrZlzNIKbjhb79nr1rjL9OpJMoOJ19fjAhyeSdHzKIJP8+0GDb2tiiizVtcIG03j+GeBgDABExPr71sfsalEYNDUvigpoSdgc2rJOfdeqQnNd9YsFcu8fjm+Az7VgKAr5iEnaYTHU5pghLW3I2fHfU9uQkiJhYJg38KuT7A5VSE2XZnskwunNT9VFaYEUQmecTQCP40YaTPX5MCXp3NpMaDGHTkI6nLB1AG3WcI46KDkEok9gECTAR4leIEWCezK9Q1/tqx9PuoLU/L36mmrJoBizR8WlHoHuuUeFZUph+9Jo329ugsqDIpVFqU9Y3EK3d+SEQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(82310400026)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Mar 2025 07:33:09.5502 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 81015b23-9dec-479c-a2f8-08dd6d019f90 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB9458 When init_rebar() fails, the new codes will try to hide Rebar capability, so it can't rely on vpci_deassign_device() to remove all Rebar related registers anymore, those registers must be cleaned up in failure path of init_rebar. To do that, use a vpci_register array to record all Rebar registers and call vpci_remove_register() to remove registers. Signed-off-by: Jiqian Chen --- xen/drivers/vpci/rebar.c | 33 ++++++++++++++++++++------------- xen/drivers/vpci/vpci.c | 14 -------------- xen/include/xen/vpci.h | 15 +++++++++++++++ 3 files changed, 35 insertions(+), 27 deletions(-) diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c index 7c53ee031887..5f2f9978feb9 100644 --- a/xen/drivers/vpci/rebar.c +++ b/xen/drivers/vpci/rebar.c @@ -51,8 +51,11 @@ static void cf_check rebar_ctrl_write(const struct pci_dev *pdev, static int cf_check init_rebar(struct pci_dev *pdev) { + int rc = 0; uint32_t ctrl; unsigned int nbars; + unsigned int reg_index = 0; + struct vpci_register registers[VPCI_CAP_MAX_REGISTER]; unsigned int rebar_offset = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_REBAR); @@ -70,17 +73,17 @@ static int cf_check init_rebar(struct pci_dev *pdev) nbars = MASK_EXTR(ctrl, PCI_REBAR_CTRL_NBAR_MASK); for ( unsigned int i = 0; i < nbars; i++ ) { - int rc; + const unsigned int offset = rebar_offset + PCI_REBAR_CTRL(i); struct vpci_bar *bar; unsigned int index; - ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL(i)); + ctrl = pci_conf_read32(pdev->sbdf, offset); index = ctrl & PCI_REBAR_CTRL_BAR_IDX; if ( index >= PCI_HEADER_NORMAL_NR_BARS ) { printk(XENLOG_ERR "%pd %pp: too big BAR number %u in REBAR_CTRL\n", pdev->domain, &pdev->sbdf, index); - continue; + goto fail; } bar = &pdev->vpci->header.bars[index]; @@ -88,24 +91,19 @@ static int cf_check init_rebar(struct pci_dev *pdev) { printk(XENLOG_ERR "%pd %pp: BAR%u is not in memory space\n", pdev->domain, &pdev->sbdf, index); - continue; + goto fail; } rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rebar_ctrl_write, - rebar_offset + PCI_REBAR_CTRL(i), 4, bar); + offset, 4, bar); if ( rc ) { printk(XENLOG_ERR "%pd %pp: BAR%u fail to add reg of REBAR_CTRL rc=%d\n", pdev->domain, &pdev->sbdf, index, rc); - /* - * Ideally we would hide the ReBar capability on error, but code - * for doing so still needs to be written. Use continue instead - * to keep any already setup register hooks, as returning an - * error will cause the hardware domain to get unmediated access - * to all device registers. - */ - continue; + goto fail; } + registers[reg_index].offset = offset; + registers[reg_index++].size = 4; bar->resizable_sizes = MASK_EXTR(pci_conf_read32(pdev->sbdf, @@ -117,6 +115,15 @@ static int cf_check init_rebar(struct pci_dev *pdev) } return 0; + + fail: + for ( unsigned int i = 0; i < reg_index; i++ ) + if ( vpci_remove_register(pdev->vpci, + registers[i].offset, + registers[i].size) ) + continue; + + return rc; } REGISTER_VPCI_EXTEND_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar, VPCI_PRIORITY_LOW); diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index a8362e46e097..ea81d8cc9604 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -21,20 +21,6 @@ #include #include -/* Internal struct to store the emulated PCI registers. */ -struct vpci_register { - vpci_read_t *read; - vpci_write_t *write; - unsigned int size; - unsigned int offset; - void *private; - struct list_head node; - uint32_t ro_mask; - uint32_t rw1c_mask; - uint32_t rsvdp_mask; - uint32_t rsvdz_mask; -}; - #ifdef __XEN__ extern vpci_capability_t *const __start_vpci_array[]; extern vpci_capability_t *const __end_vpci_array[]; diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index fa13397ae409..19a036c22165 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -214,6 +214,21 @@ struct vpci_vcpu { bool rom_only : 1; }; +#define VPCI_CAP_MAX_REGISTER 10 + +struct vpci_register { + vpci_read_t *read; + vpci_write_t *write; + unsigned int size; + unsigned int offset; + void *private; + struct list_head node; + uint32_t ro_mask; + uint32_t rw1c_mask; + uint32_t rsvdp_mask; + uint32_t rsvdz_mask; +}; + #ifdef __XEN__ void vpci_dump_msi(void); From patchwork Thu Mar 27 07:32:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 14030820 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72010C3600C for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Jiqian Chen To: CC: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Huang Rui , Jiqian Chen Subject: [PATCH v1 3/3] vpci/msi: Remove registers when init_msi() fails Date: Thu, 27 Mar 2025 15:32:14 +0800 Message-ID: <20250327073214.158210-3-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250327073214.158210-1-Jiqian.Chen@amd.com> References: <20250327073214.158210-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468D:EE_|MN2PR12MB4128:EE_ X-MS-Office365-Filtering-Correlation-Id: 497b1b5f-847b-43df-e616-08dd6d019fe5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|1800799024|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Mar 2025 07:33:10.1101 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 497b1b5f-847b-43df-e616-08dd6d019fe5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4128 When init_msi() fails, the new codes will try to hide MSI capability, so it can't rely on vpci_deassign_device() to remove all MSI related registers anymore, those registers must be cleaned up in failure path of init_msi. To do that, use a vpci_register array to record all MSI registers and call vpci_remove_register() to remove registers. Signed-off-by: Jiqian Chen --- xen/drivers/vpci/msi.c | 57 +++++++++++++++++++++++++++++------------- 1 file changed, 39 insertions(+), 18 deletions(-) diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index 9d7a9fd8dba1..30ef97efb7b0 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -195,6 +195,9 @@ static void cf_check mask_write( static int cf_check init_msi(struct pci_dev *pdev) { + unsigned int offset; + unsigned int reg_index = 0; + struct vpci_register registers[VPCI_CAP_MAX_REGISTER]; unsigned int pos = pdev->msi_pos; uint16_t control; int ret; @@ -206,15 +209,13 @@ static int cf_check init_msi(struct pci_dev *pdev) if ( !pdev->vpci->msi ) return -ENOMEM; + offset = msi_control_reg(pos); ret = vpci_add_register(pdev->vpci, control_read, control_write, - msi_control_reg(pos), 2, pdev->vpci->msi); + offset, 2, pdev->vpci->msi); if ( ret ) - /* - * NB: there's no need to free the msi struct or remove the register - * handlers form the config space, the caller will take care of the - * cleanup. - */ - return ret; + goto fail; + registers[reg_index].offset = offset; + registers[reg_index++].size = 2; /* Get the maximum number of vectors the device supports. */ control = pci_conf_read16(pdev->sbdf, msi_control_reg(pos)); @@ -234,33 +235,42 @@ static int cf_check init_msi(struct pci_dev *pdev) pdev->vpci->msi->address64 = is_64bit_address(control); pdev->vpci->msi->masking = is_mask_bit_support(control); + offset = msi_lower_address_reg(pos); ret = vpci_add_register(pdev->vpci, address_read, address_write, - msi_lower_address_reg(pos), 4, pdev->vpci->msi); + offset, 4, pdev->vpci->msi); if ( ret ) - return ret; + goto fail; + registers[reg_index].offset = offset; + registers[reg_index++].size = 4; + offset = msi_data_reg(pos, pdev->vpci->msi->address64); ret = vpci_add_register(pdev->vpci, data_read, data_write, - msi_data_reg(pos, pdev->vpci->msi->address64), 2, - pdev->vpci->msi); + offset, 2, pdev->vpci->msi); if ( ret ) - return ret; + goto fail; + registers[reg_index].offset = offset; + registers[reg_index++].size = 2; if ( pdev->vpci->msi->address64 ) { + offset = msi_upper_address_reg(pos); ret = vpci_add_register(pdev->vpci, address_hi_read, address_hi_write, - msi_upper_address_reg(pos), 4, pdev->vpci->msi); + offset, 4, pdev->vpci->msi); if ( ret ) - return ret; + goto fail; + registers[reg_index].offset = offset; + registers[reg_index++].size = 4; } if ( pdev->vpci->msi->masking ) { + offset = msi_mask_bits_reg(pos, pdev->vpci->msi->address64); ret = vpci_add_register(pdev->vpci, mask_read, mask_write, - msi_mask_bits_reg(pos, - pdev->vpci->msi->address64), - 4, pdev->vpci->msi); + offset, 4, pdev->vpci->msi); if ( ret ) - return ret; + goto fail; + registers[reg_index].offset = offset; + registers[reg_index++].size = 4; /* * FIXME: do not add any handler for the pending bits for the hardware * domain, which means direct access. This will be revisited when @@ -269,6 +279,17 @@ static int cf_check init_msi(struct pci_dev *pdev) } return 0; + + fail: + for ( unsigned int i = 0; i < reg_index; i++ ) + if ( vpci_remove_register(pdev->vpci, + registers[i].offset, + registers[i].size) ) + continue; + xfree(pdev->vpci->msi); + pdev->vpci->msi = NULL; + + return ret; } REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi, VPCI_PRIORITY_LOW);