From patchwork Sat Mar 29 12:12:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Madieu X-Patchwork-Id: 14032674 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7711817A2E8; Sat, 29 Mar 2025 12:13:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743250397; cv=none; b=Rlf4DwiVoVWgidh9ttgT6GEDrvAOSAohZE/FPiunbcFLd6m2spLWn6KqypFrIz+KcsL3yOFFUXEOWk/HPGo5xHZB6H6H+gRodLsdQKewvXTdz2YOp0MDExMLlF+3L07QTGYxovFRA8PcGsk3ozsLyZDY0HC5sN6iKF+MOJHInRg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743250397; c=relaxed/simple; bh=6A/Sf0HiEq2SsDh6hJTOjkUJ/Vom86gc3zUMNjEmDL0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HbDf1COfEiolVd6RW/kuuEvhGy7635z5wvg+Vc2rw4mlw+9K1QOb0gDWjwNbGcwCycY7WANKKf5iCAyBQGhtTPizBNE+QLQcg0eJ1dtI4scHWlRlBMlMmxlSamQAhKdwYYeTOPoOE8POTv6m6sjoZfmhJZYwDO1apvhQxArhiVs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: y6maGr/cTtyLeB25folhDg== X-CSE-MsgGUID: 2dH9T0VeTM+HUdBcjxDYDw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 29 Mar 2025 21:13:09 +0900 Received: from ubuntu.adwin.renesas.com (unknown [10.226.92.9]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id DD54D40062A6; Sat, 29 Mar 2025 21:13:05 +0900 (JST) From: John Madieu To: john.madieu.xa@bp.renesas.com, conor+dt@kernel.org, geert+renesas@glider.be, krzk+dt@kernel.org, magnus.damm@gmail.com, robh@kernel.org Cc: biju.das.jz@bp.renesas.com, devicetree@vger.kernel.org, john.madieu@gmail.com, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 1/2] arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol Date: Sat, 29 Mar 2025 13:12:56 +0100 Message-ID: <20250329121258.172099-2-john.madieu.xa@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250329121258.172099-1-john.madieu.xa@bp.renesas.com> References: <20250329121258.172099-1-john.madieu.xa@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add device node for i2c2 pincontrol. Also enable i2c2 device node on dtsi with 1MHz clock frequency as it is connected to PMIC raa215300 on RZ/G3E SoM. Signed-off-by: John Madieu --- arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi index 72b42a81bcf3..ca56a9edda2e 100644 --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi @@ -18,6 +18,7 @@ / { compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047"; aliases { + i2c2 = &i2c2; mmc0 = &sdhi0; mmc2 = &sdhi2; }; @@ -51,7 +52,19 @@ &audio_extal_clk { clock-frequency = <48000000>; }; +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + clock-frequency = <1000000>; + status = "okay"; +}; + &pinctrl { + i2c2_pins: i2c { + pinmux = , /* SCL2 */ + ; /* SDA2 */ + }; + sdhi0_emmc_pins: sd0-emmc { sd0-ctrl { pins = "SD0CLK", "SD0CMD"; From patchwork Sat Mar 29 12:12:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Madieu X-Patchwork-Id: 14032675 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 190051B4244; Sat, 29 Mar 2025 12:13:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743250397; cv=none; b=NpBbEP6mNgbU1H7jTnLQzlLQC9NreNTpjRpkXOfV+GUBp1JDv+ZrpUF9ylkzciOmO+pUaE3k3jsc40FnTc1EO0yh6DZaT3Nf9O4HY3I6+gcfXFIWf7ktKREh0lTp3gr/OH1bML+jHVPd6ZtAKgPeCz2maTXRab9AcJvozeUt+BY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743250397; c=relaxed/simple; bh=ax3K15f/Zgu5QWrA0Wkvm7uSI6BbJockaCAoIppOOSc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=g5INkhgh5UtLLIqPBQI2AGkLjfzuLjF1s0h5ozrefAOfQJTDJSrQqCjrMsuNOssEgh/U5ov1nWMOBUvVbvztMUevip53zamWD0S6o626Ha9Bp/RcEEMe+0ew9vOHhniA6r1mnPv3vOsYTjqBtqVNvmTn3F5YtpZm7WS3f3P4my8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: ZNyKp2QPQnmZgI+IoXpOnA== X-CSE-MsgGUID: +Y5B51wUQRG1+6k5DO9kig== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 29 Mar 2025 21:13:13 +0900 Received: from ubuntu.adwin.renesas.com (unknown [10.226.92.9]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id B5C5E40062A6; Sat, 29 Mar 2025 21:13:09 +0900 (JST) From: John Madieu To: john.madieu.xa@bp.renesas.com, conor+dt@kernel.org, geert+renesas@glider.be, krzk+dt@kernel.org, magnus.damm@gmail.com, robh@kernel.org Cc: biju.das.jz@bp.renesas.com, devicetree@vger.kernel.org, john.madieu@gmail.com, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: renesas: rzg3e-smarc-som: add raa215300 pmic support Date: Sat, 29 Mar 2025 13:12:57 +0100 Message-ID: <20250329121258.172099-3-john.madieu.xa@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250329121258.172099-1-john.madieu.xa@bp.renesas.com> References: <20250329121258.172099-1-john.madieu.xa@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable raa215300 pmic and built-in rtc support on RZ/G3E SoM module Also add related clock and interrupt signals. Signed-off-by: John Madieu --- .../boot/dts/renesas/rzg3e-smarc-som.dtsi | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi index ca56a9edda2e..cc0a477d6f61 100644 --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi @@ -46,6 +46,13 @@ reg_3p3v: regulator-3p3v { regulator-boot-on; regulator-always-on; }; + + /* 32.768kHz crystal */ + x3: x3-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; &audio_extal_clk { @@ -57,6 +64,19 @@ &i2c2 { pinctrl-names = "default"; clock-frequency = <1000000>; status = "okay"; + + raa215300: pmic@12 { + compatible = "renesas,raa215300"; + reg = <0x12>, <0x6f>; + reg-names = "main", "rtc"; + clocks = <&x3>; + clock-names = "xin"; + + pinctrl-0 = <&rtc_irq_pin>; + pinctrl-names = "default"; + + interrupts-extended = <&pinctrl RZG3E_GPIO(S, 1) IRQ_TYPE_EDGE_FALLING>; + }; }; &pinctrl { @@ -65,6 +85,11 @@ i2c2_pins: i2c { ; /* SDA2 */ }; + rtc_irq_pin: rtc-irq { + pins = "PS1"; + bias-pull-up; + }; + sdhi0_emmc_pins: sd0-emmc { sd0-ctrl { pins = "SD0CLK", "SD0CMD";