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[35.204.239.8]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac71967ffcdsm757406966b.140.2025.04.01.03.11.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 03:11:09 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Tue, 01 Apr 2025 11:11:02 +0100 Subject: [PATCH v5 1/2] dt-bindings: reset: syscon-reboot: add google,gs101-reboot MIME-Version: 1.0 Message-Id: <20250401-syscon-reboot-reset-mode-v5-1-5b9357442363@linaro.org> References: <20250401-syscon-reboot-reset-mode-v5-0-5b9357442363@linaro.org> In-Reply-To: <20250401-syscon-reboot-reset-mode-v5-0-5b9357442363@linaro.org> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250401_031111_946437_F3CBF30F X-CRM114-Status: GOOD ( 10.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org GS101 supports a couple different reset types via certain registers in the SYSCON register map. Add a compatible for it. When in effect, all register values and offsets are implied, hence they shall not be specified in that case. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski --- .../bindings/power/reset/syscon-reboot.yaml | 42 +++++++++++++++------- 1 file changed, 30 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml index 19d3093e6cd2f7e39d94c56636dc202a4427ffc3..ccd5558700943ef56f5e1c866400bcc21c0115f0 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml @@ -21,7 +21,9 @@ description: |+ properties: compatible: - const: syscon-reboot + enum: + - syscon-reboot + - google,gs101-reboot mask: $ref: /schemas/types.yaml#/definitions/uint32 @@ -49,12 +51,6 @@ properties: priority: default: 192 -oneOf: - - required: - - offset - - required: - - reg - required: - compatible @@ -63,12 +59,29 @@ additionalProperties: false allOf: - $ref: restart-handler.yaml# - if: - not: - required: - - mask + properties: + compatible: + contains: + const: google,gs101-reboot then: - required: - - value + properties: + mask: false + offset: false + reg: false + value: false + + else: + if: + not: + required: + - mask + then: + required: + - value + + oneOf: + - required: [offset] + - required: [reg] examples: - | @@ -78,3 +91,8 @@ examples: offset = <0x0>; mask = <0x1>; }; + + - | + reboot { + compatible = "google,gs101-reboot"; + }; From patchwork Tue Apr 1 10:11:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 14034662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6CB4BC36014 for ; Tue, 1 Apr 2025 10:33:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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[35.204.239.8]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac71967ffcdsm757406966b.140.2025.04.01.03.11.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 03:11:10 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Tue, 01 Apr 2025 11:11:03 +0100 Subject: [PATCH v5 2/2] power: reset: syscon-reboot: add gs101-specific reset MIME-Version: 1.0 Message-Id: <20250401-syscon-reboot-reset-mode-v5-2-5b9357442363@linaro.org> References: <20250401-syscon-reboot-reset-mode-v5-0-5b9357442363@linaro.org> In-Reply-To: <20250401-syscon-reboot-reset-mode-v5-0-5b9357442363@linaro.org> To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250401_031112_445179_E61BD3E4 X-CRM114-Status: GOOD ( 21.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Linux supports a couple different reset modes, but this driver here doesn't distinguish between them and issues the same syscon register write irrespective of the reset mode requested by the kernel. Since DTs should not encode register writes (see e.g. [1]), update this driver to support different reset modes based on DT compatible match. At the same time, add support for Google GS101, which does support cold, hard, warm, and soft. As an example why this is useful, other than properly supporting the Linux reboot= kernel command line option or sysfs entry, this change allows gs101-platforms to default to a more secure cold-reset, but also to warm-reset in case RAM contents needs to be retained across the reset. Link: https://lore.kernel.org/all/20250227132644.GA1924628-robh@kernel.org/ [1] Signed-off-by: André Draszik --- drivers/power/reset/syscon-reboot.c | 98 +++++++++++++++++++++++++++++-------- 1 file changed, 77 insertions(+), 21 deletions(-) diff --git a/drivers/power/reset/syscon-reboot.c b/drivers/power/reset/syscon-reboot.c index d623d77e657e4c233d8ae88bb099bee13c48a9ef..2e2cf5f62d733c7c07110f3052583607e25afd5d 100644 --- a/drivers/power/reset/syscon-reboot.c +++ b/drivers/power/reset/syscon-reboot.c @@ -14,11 +14,24 @@ #include #include -struct syscon_reboot_context { - struct regmap *map; +struct reboot_mode_bits { u32 offset; - u32 value; u32 mask; + u32 value; + bool valid; +}; + +struct reboot_data { + struct reboot_mode_bits mode_bits[REBOOT_SOFT + 1]; + struct reboot_mode_bits catchall; +}; + +struct syscon_reboot_context { + struct regmap *map; + + const struct reboot_data *rd; /* from of match data, if any */ + struct reboot_mode_bits catchall; /* from DT */ + struct notifier_block restart_handler; }; @@ -28,9 +41,21 @@ static int syscon_restart_handle(struct notifier_block *this, struct syscon_reboot_context *ctx = container_of(this, struct syscon_reboot_context, restart_handler); + const struct reboot_mode_bits *mode_bits; + + if (ctx->rd) { + if (mode < ARRAY_SIZE(ctx->rd->mode_bits) && + ctx->rd->mode_bits[mode].valid) + mode_bits = &ctx->rd->mode_bits[mode]; + else + mode_bits = &ctx->rd->catchall; + } else { + mode_bits = &ctx->catchall; + } /* Issue the reboot */ - regmap_update_bits(ctx->map, ctx->offset, ctx->mask, ctx->value); + regmap_update_bits(ctx->map, mode_bits->offset, mode_bits->mask, + mode_bits->value); mdelay(1000); @@ -42,7 +67,6 @@ static int syscon_reboot_probe(struct platform_device *pdev) { struct syscon_reboot_context *ctx; struct device *dev = &pdev->dev; - int mask_err, value_err; int priority; int err; @@ -60,24 +84,33 @@ static int syscon_reboot_probe(struct platform_device *pdev) if (of_property_read_s32(pdev->dev.of_node, "priority", &priority)) priority = 192; - if (of_property_read_u32(pdev->dev.of_node, "offset", &ctx->offset)) - if (of_property_read_u32(pdev->dev.of_node, "reg", &ctx->offset)) - return -EINVAL; + ctx->rd = of_device_get_match_data(dev); + if (!ctx->rd) { + int mask_err, value_err; - value_err = of_property_read_u32(pdev->dev.of_node, "value", &ctx->value); - mask_err = of_property_read_u32(pdev->dev.of_node, "mask", &ctx->mask); - if (value_err && mask_err) { - dev_err(dev, "unable to read 'value' and 'mask'"); - return -EINVAL; - } + if (of_property_read_u32(pdev->dev.of_node, "offset", + &ctx->catchall.offset) && + of_property_read_u32(pdev->dev.of_node, "reg", + &ctx->catchall.offset)) + return -EINVAL; - if (value_err) { - /* support old binding */ - ctx->value = ctx->mask; - ctx->mask = 0xFFFFFFFF; - } else if (mask_err) { - /* support value without mask*/ - ctx->mask = 0xFFFFFFFF; + value_err = of_property_read_u32(pdev->dev.of_node, "value", + &ctx->catchall.value); + mask_err = of_property_read_u32(pdev->dev.of_node, "mask", + &ctx->catchall.mask); + if (value_err && mask_err) { + dev_err(dev, "unable to read 'value' and 'mask'"); + return -EINVAL; + } + + if (value_err) { + /* support old binding */ + ctx->catchall.value = ctx->catchall.mask; + ctx->catchall.mask = 0xFFFFFFFF; + } else if (mask_err) { + /* support value without mask */ + ctx->catchall.mask = 0xFFFFFFFF; + } } ctx->restart_handler.notifier_call = syscon_restart_handle; @@ -89,7 +122,30 @@ static int syscon_reboot_probe(struct platform_device *pdev) return err; } +static const struct reboot_data gs101_reboot_data = { + .mode_bits = { + [REBOOT_WARM] = { + .offset = 0x3a00, /* SYSTEM_CONFIGURATION */ + .mask = 0x00000002, /* SWRESET_SYSTEM */ + .value = 0x00000002, + .valid = true, + }, + [REBOOT_SOFT] = { + .offset = 0x3a00, /* SYSTEM_CONFIGURATION */ + .mask = 0x00000002, /* SWRESET_SYSTEM */ + .value = 0x00000002, + .valid = true, + }, + }, + .catchall = { + .offset = 0x3e9c, /* PAD_CTRL_PWR_HOLD */ + .mask = 0x00000100, + .value = 0x00000000, + }, +}; + static const struct of_device_id syscon_reboot_of_match[] = { + { .compatible = "google,gs101-reboot", .data = &gs101_reboot_data }, { .compatible = "syscon-reboot" }, {} };