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Signed-off-by: Will McVicker Acked-by: Rob Herring (Arm) --- drivers/of/irq.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index f8ad79b9b1c9..5adda1dac3cf 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -519,6 +519,7 @@ int of_irq_count(struct device_node *dev) return nr; } +EXPORT_SYMBOL_GPL(of_irq_count); /** * of_irq_to_resource_table - Fill in resource table with node's IRQ info From patchwork Wed Apr 2 23:33:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William McVicker X-Patchwork-Id: 14036613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F9EBC36018 for ; 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Wed, 02 Apr 2025 16:34:46 -0700 (PDT) Date: Wed, 2 Apr 2025 16:33:53 -0700 In-Reply-To: <20250402233407.2452429-1-willmcvicker@google.com> Mime-Version: 1.0 References: <20250402233407.2452429-1-willmcvicker@google.com> X-Mailer: git-send-email 2.49.0.472.ge94155a9ec-goog Message-ID: <20250402233407.2452429-3-willmcvicker@google.com> Subject: [PATCH v2 2/7] clocksource/drivers/exynos_mct: Don't register as a sched_clock on arm64 From: Will McVicker To: Catalin Marinas , Will Deacon , Peter Griffin , " =?utf-8?q?Andr=C3=A9_Draszik?= " , Tudor Ambarus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Daniel Lezcano , Thomas Gleixner , Saravana Kannan , Krzysztof Kozlowski Cc: Will McVicker , Donghoon Yu , Hosung Kim , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Youngmin Nam , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250402_163448_355244_4E5DB9E2 X-CRM114-Status: GOOD ( 16.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org To use the MCT as a sched_clock, the timer value has to be accessed vi an MCT register which is extremely slow. To improve performance on Arm64 SoCs, use the Arm architected timer as the default clocksource. Note, we can't completely disable the MCT on Arm64 since it needs to be used as the wakeup source for the arch_timer to exit the "c2" idle state. Since ARM SoCs don't have an architectured timer, the MCT will continue to be the default clocksource. Detailed discussion on this topic can be found at [1]. [1] https://lore.kernel.org/linux-samsung-soc/1400188079-21832-1-git-send-email-chirantan@chromium.org/ Signed-off-by: Donghoon Yu Signed-off-by: Youngmin Nam [Original commit from https://android.googlesource.com/kernel/gs/+/630817f7080e92c5e0216095ff52f6eb8dd00727 Signed-off-by: Will McVicker Reviewed-by: Youngmin Nam Acked-by: John Stultz --- drivers/clocksource/exynos_mct.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index da09f467a6bb..96361d5dc57d 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -219,12 +219,18 @@ static struct clocksource mct_frc = { .resume = exynos4_frc_resume, }; +/* + * Since ARM devices do not have an architected timer, they need to continue + * using the MCT as the main clocksource for timekeeping, sched_clock, and the + * delay timer. For AARCH64 SoCs, the architected timer is the preferred + * clocksource due to it's superior performance. + */ +#if defined(CONFIG_ARM) static u64 notrace exynos4_read_sched_clock(void) { return exynos4_read_count_32(); } -#if defined(CONFIG_ARM) static struct delay_timer exynos4_delay_timer; static cycles_t exynos4_read_current_timer(void) @@ -250,12 +256,13 @@ static int __init exynos4_clocksource_init(bool frc_shared) exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; exynos4_delay_timer.freq = clk_rate; register_current_timer_delay(&exynos4_delay_timer); + + sched_clock_register(exynos4_read_sched_clock, 32, clk_rate); #endif if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name); - sched_clock_register(exynos4_read_sched_clock, 32, clk_rate); return 0; } From patchwork Wed Apr 2 23:33:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William McVicker X-Patchwork-Id: 14036614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3DD3C36018 for ; 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Wed, 02 Apr 2025 16:34:48 -0700 (PDT) Date: Wed, 2 Apr 2025 16:33:54 -0700 In-Reply-To: <20250402233407.2452429-1-willmcvicker@google.com> Mime-Version: 1.0 References: <20250402233407.2452429-1-willmcvicker@google.com> X-Mailer: git-send-email 2.49.0.472.ge94155a9ec-goog Message-ID: <20250402233407.2452429-4-willmcvicker@google.com> Subject: [PATCH v2 3/7] clocksource/drivers/exynos_mct: Set local timer interrupts as percpu From: Will McVicker To: Catalin Marinas , Will Deacon , Peter Griffin , " =?utf-8?q?Andr=C3=A9_Draszik?= " , Tudor Ambarus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Daniel Lezcano , Thomas Gleixner , Saravana Kannan , Krzysztof Kozlowski Cc: Will McVicker , Donghoon Yu , Hosung Kim , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Youngmin Nam , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250402_163450_199852_D2DAF30A X-CRM114-Status: GOOD ( 12.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Hosung Kim To allow the CPU to handle it's own clock events, we need to set the IRQF_PERCPU flag. This prevents the local timer interrupts from migrating to other CPUs. Signed-off-by: Hosung Kim [Original commit from https://android.googlesource.com/kernel/gs/+/03267fad19f093bac979ca78309483e9eb3a8d16] Signed-off-by: Will McVicker --- drivers/clocksource/exynos_mct.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 96361d5dc57d..a5ef7d64b1c2 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -596,7 +596,8 @@ static int __init exynos4_timer_interrupts(struct device_node *np, irq_set_status_flags(mct_irq, IRQ_NOAUTOEN); if (request_irq(mct_irq, exynos4_mct_tick_isr, - IRQF_TIMER | IRQF_NOBALANCING, + IRQF_TIMER | IRQF_NOBALANCING | + IRQF_PERCPU, pcpu_mevt->name, pcpu_mevt)) { pr_err("exynos-mct: cannot register IRQ (cpu%d)\n", cpu); From patchwork Wed Apr 2 23:33:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William McVicker X-Patchwork-Id: 14036619 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3EEEC36018 for ; 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Wed, 02 Apr 2025 16:34:51 -0700 (PDT) Date: Wed, 2 Apr 2025 16:33:55 -0700 In-Reply-To: <20250402233407.2452429-1-willmcvicker@google.com> Mime-Version: 1.0 References: <20250402233407.2452429-1-willmcvicker@google.com> X-Mailer: git-send-email 2.49.0.472.ge94155a9ec-goog Message-ID: <20250402233407.2452429-5-willmcvicker@google.com> Subject: [PATCH v2 4/7] arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes From: Will McVicker To: Catalin Marinas , Will Deacon , Peter Griffin , " =?utf-8?q?Andr=C3=A9_Draszik?= " , Tudor Ambarus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Daniel Lezcano , Thomas Gleixner , Saravana Kannan Cc: Will McVicker , Donghoon Yu , Hosung Kim , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Youngmin Nam , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Will Deacon X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250402_163452_408879_93880060 X-CRM114-Status: GOOD ( 11.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Will Deacon In preparation for switching to the architected timer as the primary clockevents device, mark the cpuidle nodes with the 'local-timer-stop' property to indicate that an alternative clockevents device must be used for waking up from the "c2" idle state. Signed-off-by: Will Deacon [Original commit from https://android.googlesource.com/kernel/gs/+/a896fd98638047989513d05556faebd28a62b27c] Signed-off-by: Will McVicker --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 3de3a758f113..fd0badf24e6f 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -155,6 +155,7 @@ ananke_cpu_sleep: cpu-ananke-sleep { idle-state-name = "c2"; compatible = "arm,idle-state"; arm,psci-suspend-param = <0x0010000>; + local-timer-stop; entry-latency-us = <70>; exit-latency-us = <160>; min-residency-us = <2000>; @@ -164,6 +165,7 @@ enyo_cpu_sleep: cpu-enyo-sleep { idle-state-name = "c2"; compatible = "arm,idle-state"; arm,psci-suspend-param = <0x0010000>; + local-timer-stop; entry-latency-us = <150>; exit-latency-us = <190>; min-residency-us = <2500>; @@ -173,6 +175,7 @@ hera_cpu_sleep: cpu-hera-sleep { idle-state-name = "c2"; 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AJvYcCXJegQUPWMvuOOe9i0v6y+lPW0m2hhCidy1Dv9Lfwi7f+WDzNjhpkhLEO8VzxkK+NkyC4UUmE0LH4w/vo/LzFcq@lists.infradead.org X-Gm-Message-State: AOJu0YwfFIOCnHrujH2LhbbJcTCC5KWF1lSm5ydtlbLUlQPO9QUOtvjj Ul6579ennGqscLFjehqyO8I2iyqC/Co3C99vde+uu9SJYUjD4RgeSuX60q5y9WFhu9PgzXEJiNp 5HdmdHon7144IqqeJYH5jsaabRQ== X-Google-Smtp-Source: AGHT+IGiCVuhnR8Hm4ls6yhYVA+bAhMO7b7R8+FdaaPf0Sw6oW8BjVfyrFlY1Hg1Xa0Er5xFqEgThNby8zWx1wNh1Eo= X-Received: from pfjd22.prod.google.com ([2002:a05:6a00:2456:b0:736:9c55:9272]) (user=willmcvicker job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:cf0f:b0:220:fe51:1aab with SMTP id d9443c01a7336-22977e0fa71mr9553365ad.38.1743636893194; Wed, 02 Apr 2025 16:34:53 -0700 (PDT) Date: Wed, 2 Apr 2025 16:33:56 -0700 In-Reply-To: <20250402233407.2452429-1-willmcvicker@google.com> Mime-Version: 1.0 References: <20250402233407.2452429-1-willmcvicker@google.com> X-Mailer: git-send-email 2.49.0.472.ge94155a9ec-goog Message-ID: <20250402233407.2452429-6-willmcvicker@google.com> Subject: [PATCH v2 5/7] clocksource/drivers/exynos_mct: Fix uninitialized irq name warning From: Will McVicker To: Catalin Marinas , Will Deacon , Peter Griffin , " =?utf-8?q?Andr=C3=A9_Draszik?= " , Tudor Ambarus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Daniel Lezcano , Thomas Gleixner , Saravana Kannan , Krzysztof Kozlowski Cc: Will McVicker , Donghoon Yu , Hosung Kim , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Youngmin Nam , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250402_163454_970267_8DB4F2E0 X-CRM114-Status: GOOD ( 18.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Exynos MCT driver doesn't set the clocksource name until the CPU hotplug state is setup which happens after the IRQs are requested. This results in an empty IRQ name which leads to the below warning at proc_create() time. When this happens, the userdata partition fails to mount and the device gets stuck in an endless loop printing the error: root '/dev/disk/by-partlabel/userdata' doesn't exist or does not contain a /dev. To fix this, we just need to initialize the name before requesting the IRQs. Warning from Pixel 6 kernel log: [ T430] name len 0 [ T430] WARNING: CPU: 6 PID: 430 at fs/proc/generic.c:407 __proc_create+0x258/0x2b4 [ T430] Modules linked in: dwc3_exynos(E+) [ T430] ufs_exynos(E+) phy_exynos_ufs(E) [ T430] phy_exynos5_usbdrd(E) exynos_usi(E+) exynos_mct(E+) s3c2410_wdt(E) [ T430] arm_dsu_pmu(E) simplefb(E) [ T430] CPU: 6 UID: 0 PID: 430 Comm: (udev-worker) Tainted: ... 6.14.0-next-20250331-4k-00008-g59adf909e40e #1 ... [ T430] Tainted: [W]=WARN, [E]=UNSIGNED_MODULE [ T430] Hardware name: Raven (DT) [...] [ T430] Call trace: [ T430] __proc_create+0x258/0x2b4 (P) [ T430] proc_mkdir+0x40/0xa0 [ T430] register_handler_proc+0x118/0x140 [ T430] __setup_irq+0x460/0x6d0 [ T430] request_threaded_irq+0xcc/0x1b0 [ T430] mct_init_dt+0x244/0x604 [exynos_mct ...] [ T430] mct_init_spi+0x18/0x34 [exynos_mct ...] [ T430] exynos4_mct_probe+0x30/0x4c [exynos_mct ...] [ T430] platform_probe+0x6c/0xe4 [ T430] really_probe+0xf4/0x38c [...] [ T430] driver_register+0x6c/0x140 [ T430] __platform_driver_register+0x28/0x38 [ T430] exynos4_mct_driver_init+0x24/0xfe8 [exynos_mct ...] [ T430] do_one_initcall+0x84/0x3c0 [ T430] do_init_module+0x58/0x208 [ T430] load_module+0x1de0/0x2500 [ T430] init_module_from_file+0x8c/0xdc Signed-off-by: Will McVicker --- drivers/clocksource/exynos_mct.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index a5ef7d64b1c2..62febeb4e1de 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -465,8 +465,6 @@ static int exynos4_mct_starting_cpu(unsigned int cpu) per_cpu_ptr(&percpu_mct_tick, cpu); struct clock_event_device *evt = &mevt->evt; - snprintf(mevt->name, sizeof(mevt->name), "mct_tick%d", cpu); - evt->name = mevt->name; evt->cpumask = cpumask_of(cpu); evt->set_next_event = exynos4_tick_set_next_event; @@ -567,6 +565,14 @@ static int __init exynos4_timer_interrupts(struct device_node *np, for (i = MCT_L0_IRQ; i < nr_irqs; i++) mct_irqs[i] = irq_of_parse_and_map(np, i); + for_each_possible_cpu(cpu) { + struct mct_clock_event_device *mevt = + per_cpu_ptr(&percpu_mct_tick, cpu); + + snprintf(mevt->name, sizeof(mevt->name), "mct_tick%d", + cpu); + } + if (mct_int_type == MCT_INT_PPI) { err = request_percpu_irq(mct_irqs[MCT_L0_IRQ], From patchwork Wed Apr 2 23:33:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William McVicker X-Patchwork-Id: 14036621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D40CDC3601A for ; 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Wed, 02 Apr 2025 16:34:55 -0700 (PDT) Date: Wed, 2 Apr 2025 16:33:57 -0700 In-Reply-To: <20250402233407.2452429-1-willmcvicker@google.com> Mime-Version: 1.0 References: <20250402233407.2452429-1-willmcvicker@google.com> X-Mailer: git-send-email 2.49.0.472.ge94155a9ec-goog Message-ID: <20250402233407.2452429-7-willmcvicker@google.com> Subject: [PATCH v2 6/7] clocksource/drivers/exynos_mct: Add module support From: Will McVicker To: Catalin Marinas , Will Deacon , Peter Griffin , " =?utf-8?q?Andr=C3=A9_Draszik?= " , Tudor Ambarus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Daniel Lezcano , Thomas Gleixner , Saravana Kannan , Krzysztof Kozlowski Cc: Will McVicker , Donghoon Yu , Hosung Kim , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Youngmin Nam , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250402_163456_821209_AEAD94DA X-CRM114-Status: GOOD ( 22.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Donghoon Yu On Arm64 platforms the Exynos MCT driver can be built as a module. On boot (and even after boot) the arch_timer is used as the clocksource and tick timer. Once the MCT driver is loaded, it can be used as the wakeup source for the arch_timer. Signed-off-by: Donghoon Yu Signed-off-by: Youngmin Nam [original commit from https://android.googlesource.com/kernel/gs/+/8a52a8288ec7d88ff78f0b37480dbb0e9c65bbfd] Signed-off-by: Will McVicker --- drivers/clocksource/Kconfig | 3 +- drivers/clocksource/exynos_mct.c | 49 +++++++++++++++++++++++++++----- 2 files changed, 44 insertions(+), 8 deletions(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 487c85259967..e89373827c3a 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -443,7 +443,8 @@ config ATMEL_TCB_CLKSRC Support for Timer Counter Blocks on Atmel SoCs. config CLKSRC_EXYNOS_MCT - bool "Exynos multi core timer driver" if COMPILE_TEST + tristate "Exynos multi core timer driver" if ARM64 + default y if ARCH_EXYNOS || COMPILE_TEST depends on ARM || ARM64 depends on ARCH_ARTPEC || ARCH_EXYNOS || COMPILE_TEST help diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 62febeb4e1de..8943274378be 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -15,9 +15,11 @@ #include #include #include +#include #include #include #include +#include #include #include @@ -241,7 +243,7 @@ static cycles_t exynos4_read_current_timer(void) } #endif -static int __init exynos4_clocksource_init(bool frc_shared) +static int exynos4_clocksource_init(bool frc_shared) { /* * When the frc is shared, the main processor should have already @@ -511,7 +513,7 @@ static int exynos4_mct_dying_cpu(unsigned int cpu) return 0; } -static int __init exynos4_timer_resources(struct device_node *np) +static int exynos4_timer_resources(struct device_node *np) { struct clk *mct_clk, *tick_clk; @@ -539,7 +541,7 @@ static int __init exynos4_timer_resources(struct device_node *np) * @local_idx: array mapping CPU numbers to local timer indices * @nr_local: size of @local_idx array */ -static int __init exynos4_timer_interrupts(struct device_node *np, +static int exynos4_timer_interrupts(struct device_node *np, unsigned int int_type, const u32 *local_idx, size_t nr_local) @@ -652,7 +654,7 @@ static int __init exynos4_timer_interrupts(struct device_node *np, return err; } -static int __init mct_init_dt(struct device_node *np, unsigned int int_type) +static int mct_init_dt(struct device_node *np, unsigned int int_type) { bool frc_shared = of_property_read_bool(np, "samsung,frc-shared"); u32 local_idx[MCT_NR_LOCAL] = {0}; @@ -700,15 +702,48 @@ static int __init mct_init_dt(struct device_node *np, unsigned int int_type) return exynos4_clockevent_init(); } - -static int __init mct_init_spi(struct device_node *np) +static int mct_init_spi(struct device_node *np) { return mct_init_dt(np, MCT_INT_SPI); } -static int __init mct_init_ppi(struct device_node *np) +static int mct_init_ppi(struct device_node *np) { return mct_init_dt(np, MCT_INT_PPI); } + +#ifdef MODULE +static int exynos4_mct_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + int (*mct_init)(struct device_node *np); + + mct_init = of_device_get_match_data(dev); + if (!mct_init) + return -EINVAL; + + return mct_init(dev->of_node); +} + +static const struct of_device_id exynos4_mct_match_table[] = { + { .compatible = "samsung,exynos4210-mct", .data = &mct_init_spi, }, + { .compatible = "samsung,exynos4412-mct", .data = &mct_init_ppi, }, + {} +}; +MODULE_DEVICE_TABLE(of, exynos4_mct_match_table); + +static struct platform_driver exynos4_mct_driver = { + .probe = exynos4_mct_probe, + .driver = { + .name = "exynos-mct", + .of_match_table = exynos4_mct_match_table, + }, +}; +module_platform_driver(exynos4_mct_driver); +#else TIMER_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi); TIMER_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi); +#endif + +MODULE_DESCRIPTION("Exynos Multi Core Timer Driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Apr 2 23:33:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William McVicker X-Patchwork-Id: 14036625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA6D7C36018 for ; Thu, 3 Apr 2025 00:08:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:Cc:To:From: Subject:Message-ID:References:Mime-Version:In-Reply-To:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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AJvYcCWqgFAhHzE9zcFTWQVbMurmbNuGQH2IBg5OnZca7uKkeSmw6fRDL3AlsJ2qOT09hqrLKXM5dv6TdGpbkB4M7pgy@lists.infradead.org X-Gm-Message-State: AOJu0YyAYVuuI2yyLIVmrpCaKz0WSxDEub+lB0hqsy2l3aa/Dp7KQnCg 7hEb08wEtnrAQ57SLUYpjiCnPy5xogsH+gezrBjQh9B05K20cs8lKo4d5b9F3AqBVUtULcAB5qo rsk0WN1IeCWbVtF9QfFBY0g4orA== X-Google-Smtp-Source: AGHT+IHNjNoLSXpuoWq8MvyOWd0aQH4vReKV9zSqeimLC//wD66A6paRAKR65MmP1wxkBUjus4xLZlsJIhNOroJPqoE= X-Received: from pjbov3.prod.google.com ([2002:a17:90b:2583:b0:2f7:d453:e587]) (user=willmcvicker job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:56cf:b0:2f9:c56b:6ec8 with SMTP id 98e67ed59e1d1-3056ee3608dmr6316456a91.10.1743636897333; Wed, 02 Apr 2025 16:34:57 -0700 (PDT) Date: Wed, 2 Apr 2025 16:33:58 -0700 In-Reply-To: <20250402233407.2452429-1-willmcvicker@google.com> Mime-Version: 1.0 References: <20250402233407.2452429-1-willmcvicker@google.com> X-Mailer: git-send-email 2.49.0.472.ge94155a9ec-goog Message-ID: <20250402233407.2452429-8-willmcvicker@google.com> Subject: [PATCH v2 7/7] arm64: exynos: Drop select CLKSRC_EXYNOS_MCT From: Will McVicker To: Catalin Marinas , Will Deacon , Peter Griffin , " =?utf-8?q?Andr=C3=A9_Draszik?= " , Tudor Ambarus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Daniel Lezcano , Thomas Gleixner , Saravana Kannan Cc: Will McVicker , Donghoon Yu , Hosung Kim , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Youngmin Nam , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250402_163458_364747_8C913842 X-CRM114-Status: GOOD ( 12.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since the Exynos MCT driver can be built as a module for some Arm64 SoCs like gs101, drop force-selecting it as a built-in driver by ARCH_EXYNOS and instead depend on `default y if ARCH_EXYNOS` to select it automatically. This allows platforms like Android to build the driver as a module if desired. Signed-off-by: Will McVicker --- arch/arm64/Kconfig.platforms | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 8b76821f190f..325279193e2c 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -109,7 +109,6 @@ config ARCH_BLAIZE config ARCH_EXYNOS bool "Samsung Exynos SoC family" select COMMON_CLK_SAMSUNG - select CLKSRC_EXYNOS_MCT select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS select EXYNOS_PMU select PINCTRL