From patchwork Fri Apr 4 05:18:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 14038143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33A17C3601A for ; Fri, 4 Apr 2025 05:33:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6913A10E2F2; Fri, 4 Apr 2025 05:33:35 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="AGOtiL9O"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id CD75410E2EC; Fri, 4 Apr 2025 05:33:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743744815; x=1775280815; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=NxTYpwHlfbDgQW950umsnx/d9Kl4D8uqtvrNbNN/2lQ=; b=AGOtiL9O8YL8DQssEqKsjGjtc1J8OSpfsSJnFYto9DkNh8H3xqKuhK2b 11nIU9T+0f9W9MYVXy0tIBshw/uTz9Q9KSLi9obnu9CcqZDf6pjE2JuEJ 55C63gljsfAWysnFDFxw9TZnoJ4m0xZzUpymMimQXNx5KJbB/KM7tOfGB BJq2ZxQXnYsm9ZfFZAOyM9kDqGMow2HPnFBw5IyoGWJMCL/u+YxZUzuz4 vi8HsXW+8CAumszkAScce4iy73jTYi85HjHDinp4PFMncBTeI3apLMDCR Me83o3+i8ii8fBoN5DkSsoIK1AnBAH1l+MfOyzhh/s32AVrv609Fi7TmB A==; X-CSE-ConnectionGUID: z+1nfYbqQNSzJ0VBJcugjg== X-CSE-MsgGUID: qlaMdJ2qT6e95t+le2P93Q== X-IronPort-AV: E=McAfee;i="6700,10204,11393"; a="44893394" X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="44893394" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2025 22:33:32 -0700 X-CSE-ConnectionGUID: LKJwsWysRx2qKoY0JIPYPg== X-CSE-MsgGUID: e7Kf5jGkSxCIQjzVz++H+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="126992633" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by orviesa009.jf.intel.com with ESMTP; 03 Apr 2025 22:33:28 -0700 From: Arun R Murthy Date: Fri, 04 Apr 2025 10:48:53 +0530 Subject: [PATCH RESEND v12 1/5] drm/plane: Add new plane property IN_FORMATS_ASYNC MIME-Version: 1.0 Message-Id: <20250404-asyn-v12-1-9e2396596036@intel.com> References: <20250404-asyn-v12-0-9e2396596036@intel.com> In-Reply-To: <20250404-asyn-v12-0-9e2396596036@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Jani Nikula , chaitanya.kumar.borah@intel.com, ville.syrjala@intel.com, 20250219093211.4059187-1-arun.r.murthy@intel.com, 20250311085422.2573860-1-santhosh.reddy.guddati@intel.com, Arun R Murthy , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , Naveen Kumar X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" There exists a property IN_FORMATS which exposes the plane supported modifiers/formats to the user. In some platforms when asynchronous flip are used all of modifiers/formats mentioned in IN_FORMATS are not supported. This patch adds a new plane property IN_FORMATS_ASYNC to expose the async flip supported modifiers/formats so that user can use this information ahead and do flip with unsupported formats/modifiers. This will save flip failures. Add a new function pointer similar to format_mod_supported specifically for asynchronous flip. v2: Remove async variable from drm_plane (Ville) v3: Add new function pointer for async (Ville) v5: Typo corrected in commit message & some correction in the kernel documentation. (Chaitanya) v7: Place IN_FORMATS_ASYNC next to IN_FORMATS (Ville) v8: replace uint32_t with u32 and uint64_t with u64 (Chaitanya) Signed-off-by: Arun R Murthy Reviewed-by: Chaitanya Kumar Borah Reviewed-by: Ville Syrjälä Tested-by: Naveen Kumar --- drivers/gpu/drm/drm_mode_config.c | 7 +++++++ drivers/gpu/drm/drm_plane.c | 8 ++++++++ include/drm/drm_mode_config.h | 6 ++++++ include/drm/drm_plane.h | 17 +++++++++++++++++ 4 files changed, 38 insertions(+) diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 8642a2fb25a90116dab975aa0ab6b51deafb4b96..b4239fd04e9da4d4b5cfccdef1d3dde9556f322d 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -381,6 +381,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.modifiers_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, + "IN_FORMATS_ASYNC", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.async_modifiers_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, "SIZE_HINTS", 0); diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index a28b22fdd7a41aca82d097d42237851da9a0a79b..fe181c1002171acc68d3054c2d178f9b9f501fe2 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -141,6 +141,14 @@ * various bugs in this area with inconsistencies between the capability * flag and per-plane properties. * + * IN_FORMATS_ASYNC: + * Blob property which contains the set of buffer format and modifier + * pairs supported by this plane for asynchronous flips. The blob is a struct + * drm_format_modifier_blob. Userspace cannot change this property. This is an + * optional property and if not present then user should expect a failure in + * atomic ioctl when the modifier/format is not supported by that plane under + * asynchronous flip. + * * SIZE_HINTS: * Blob property which contains the set of recommended plane size * which can used for simple "cursor like" use cases (eg. no scaling). diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 271765e2e9f2da62aaf0d258828ef4196e14822e..0c116d6dfd277262b1a4c0f097fce2d719f43844 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -936,6 +936,12 @@ struct drm_mode_config { */ struct drm_property *modifiers_property; + /** + * @async_modifiers_property: Plane property to list support modifier/format + * combination for asynchronous flips. + */ + struct drm_property *async_modifiers_property; + /** * @size_hints_property: Plane SIZE_HINTS property. */ diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index dd718c62ac31bf16606f3ee9f025a5b171cd1e67..01479dd94e76a8389a0c9e9d6744400aa2291064 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -549,6 +549,23 @@ struct drm_plane_funcs { */ bool (*format_mod_supported)(struct drm_plane *plane, uint32_t format, uint64_t modifier); + /** + * @format_mod_supported_async: + * + * This optional hook is used for the DRM to determine if for + * asynchronous flip the given format/modifier combination is valid for + * the plane. This allows the DRM to generate the correct format + * bitmask (which formats apply to which modifier), and to validate + * modifiers at atomic_check time. + * + * Returns: + * + * True if the given modifier is valid for that format on the plane. + * False otherwise. + */ + bool (*format_mod_supported_async)(struct drm_plane *plane, + u32 format, u64 modifier); + }; /** From patchwork Fri Apr 4 05:18:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 14038144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 182FAC369A0 for ; Fri, 4 Apr 2025 05:33:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A388E10E2FE; Fri, 4 Apr 2025 05:33:37 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="VZWb2JmY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6402610E2F0; Fri, 4 Apr 2025 05:33:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743744816; x=1775280816; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=yhViCb+tsh7e5ZKwbOnNx/b0WUEUkcKtzPEBQ2TIwcc=; b=VZWb2JmYJruXl25oldxtwkf/uKmXVF72SjwdLDFhv+M8McUbj7PmEnM8 9nGZr3b/2shW5uNFp02wb/IYwHNzcv11CjMrFc8Mgo6x4fkUvqXm99IgX YvJzY9TM+O2egO51KHByzMHo9BA4pRVJm0yKuRjfC2Mxk9bA2Ccnu5cX9 HEDi2jm0cgg36iaYfyI+dchXVzV7gKh8MC9X/d6Lh2bN7cX0vGk30P9Wx etLymNS2G89fqxZf0cJW9k6S7qIDkeNTTgubakUNTneIAx0jjxnlGm92A uIvFXPQEqu74pQDjVjB7Xwvto1yTa80qMaZSGj4APj3Wl8YSiR5tFPe8D A==; X-CSE-ConnectionGUID: m01t6AkQSl+WxlWPdoTAnw== X-CSE-MsgGUID: r33R3oBBT9e0QsLfEBKicQ== X-IronPort-AV: E=McAfee;i="6700,10204,11393"; a="44893400" X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="44893400" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2025 22:33:36 -0700 X-CSE-ConnectionGUID: un05jBDwQ9+wu8whmtFGMQ== X-CSE-MsgGUID: vfJ3/aUmRR2sWV491dBJNw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="126992639" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by orviesa009.jf.intel.com with ESMTP; 03 Apr 2025 22:33:32 -0700 From: Arun R Murthy Date: Fri, 04 Apr 2025 10:48:54 +0530 Subject: [PATCH RESEND v12 2/5] drm/plane: modify create_in_formats to acommodate async MIME-Version: 1.0 Message-Id: <20250404-asyn-v12-2-9e2396596036@intel.com> References: <20250404-asyn-v12-0-9e2396596036@intel.com> In-Reply-To: <20250404-asyn-v12-0-9e2396596036@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Jani Nikula , chaitanya.kumar.borah@intel.com, ville.syrjala@intel.com, 20250219093211.4059187-1-arun.r.murthy@intel.com, 20250311085422.2573860-1-santhosh.reddy.guddati@intel.com, Arun R Murthy , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , Naveen Kumar X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" create_in_formats creates the list of supported format/modifiers for synchronous flips, modify the same function so as to take the format_mod_supported as argument and create list of format/modifier for async as well. v5: create_in_formats can return -ve value in failure case, correct the if condition to check the creation of blob Dont add the modifier for which none of the formats is not supported. v6: Remove the code for masking the unsupported modifiers as UMD can leave with it. (Naveen/Chaitanya) v7: Retain the unsupported modifiers, userspace should have no impact, return pointer to blob instead of blob_id(Ville) Signed-off-by: Arun R Murthy Reviewed-by: Chaitanya Kumar Borah Reviewed-by: Ville Syrjälä Tested-by: Naveen Kumar --- drivers/gpu/drm/drm_plane.c | 44 +++++++++++++++++++++++++++++++------------- 1 file changed, 31 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index fe181c1002171acc68d3054c2d178f9b9f501fe2..04992dfd4c79274ff057961a947f4203a375d275 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -193,9 +193,13 @@ modifiers_ptr(struct drm_format_modifier_blob *blob) return (struct drm_format_modifier *)(((char *)blob) + blob->modifiers_offset); } -static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane) +static struct drm_property_blob *create_in_format_blob(struct drm_device *dev, + struct drm_plane *plane, + bool (*format_mod_supported) + (struct drm_plane *plane, + u32 format, + u64 modifier)) { - const struct drm_mode_config *config = &dev->mode_config; struct drm_property_blob *blob; struct drm_format_modifier *mod; size_t blob_size, formats_size, modifiers_size; @@ -221,7 +225,7 @@ static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane blob = drm_property_create_blob(dev, blob_size, NULL); if (IS_ERR(blob)) - return -1; + return NULL; blob_data = blob->data; blob_data->version = FORMAT_BLOB_CURRENT; @@ -237,10 +241,10 @@ static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane mod = modifiers_ptr(blob_data); for (i = 0; i < plane->modifier_count; i++) { for (j = 0; j < plane->format_count; j++) { - if (!plane->funcs->format_mod_supported || - plane->funcs->format_mod_supported(plane, - plane->format_types[j], - plane->modifiers[i])) { + if (!format_mod_supported || + format_mod_supported(plane, + plane->format_types[j], + plane->modifiers[i])) { mod->formats |= 1ULL << j; } } @@ -251,10 +255,7 @@ static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane mod++; } - drm_object_attach_property(&plane->base, config->modifiers_property, - blob->base.id); - - return 0; + return blob; } /** @@ -366,6 +367,7 @@ static int __drm_universal_plane_init(struct drm_device *dev, const char *name, va_list ap) { struct drm_mode_config *config = &dev->mode_config; + struct drm_property_blob *blob; static const uint64_t default_modifiers[] = { DRM_FORMAT_MOD_LINEAR, }; @@ -477,8 +479,24 @@ static int __drm_universal_plane_init(struct drm_device *dev, drm_plane_create_hotspot_properties(plane); } - if (format_modifier_count) - create_in_format_blob(dev, plane); + if (format_modifier_count) { + blob = create_in_format_blob(dev, plane, + plane->funcs->format_mod_supported); + if (!IS_ERR(blob)) + drm_object_attach_property(&plane->base, + config->modifiers_property, + blob->base.id); + } + + if (plane->funcs->format_mod_supported_async) { + blob = create_in_format_blob(dev, plane, + plane->funcs->format_mod_supported_async); + if (!IS_ERR(blob)) + drm_object_attach_property(&plane->base, + config->async_modifiers_property, + blob->base.id); + } + return 0; } From patchwork Fri Apr 4 05:18:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 14038145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8ABA0C3601B for ; Fri, 4 Apr 2025 05:33:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 661A210E300; Fri, 4 Apr 2025 05:33:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="M8tTC86Z"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 98E3A10E300; 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03 Apr 2025 22:33:39 -0700 X-CSE-ConnectionGUID: m592e4lQSSe68BChLc7qRQ== X-CSE-MsgGUID: 4C+Dp7llSje4ZvGSwImF+Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="126992647" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by orviesa009.jf.intel.com with ESMTP; 03 Apr 2025 22:33:35 -0700 From: Arun R Murthy Date: Fri, 04 Apr 2025 10:48:55 +0530 Subject: [PATCH RESEND v12 3/5] drm/i915/display: Acomodate format check in intel_plane_can_async_flip() MIME-Version: 1.0 Message-Id: <20250404-asyn-v12-3-9e2396596036@intel.com> References: <20250404-asyn-v12-0-9e2396596036@intel.com> In-Reply-To: <20250404-asyn-v12-0-9e2396596036@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Jani Nikula , chaitanya.kumar.borah@intel.com, ville.syrjala@intel.com, 20250219093211.4059187-1-arun.r.murthy@intel.com, 20250311085422.2573860-1-santhosh.reddy.guddati@intel.com, Arun R Murthy , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The function intel_plane_can_async_flip() checks for async supported modifier, add format support check also in the same function. Note: on ADL the surface base addr is required to be 16k aligned and if not might generate DMAR and GGTT faults leading to glitches. This patch changes the 16k alignment to 4k for planar formats. v11: Move filtering Indexed 8bit to a separate patch (Ville) v12: correct the commit msg and remove unwanted debug print (Ville) Signed-off-by: Arun R Murthy Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/i9xx_plane.c | 4 ++-- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 6 +++++- drivers/gpu/drm/i915/display/intel_atomic_plane.h | 3 ++- drivers/gpu/drm/i915/display/intel_display.c | 14 ++++---------- drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +- 5 files changed, 14 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index 5e8344fdfc28a311dc0632bb848a0e08f9e6c6d2..20c47de6d8bfd1d8ddafae02ed68370df799e22b 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -828,7 +828,7 @@ unsigned int vlv_plane_min_alignment(struct intel_plane *plane, { struct intel_display *display = to_intel_display(plane); - if (intel_plane_can_async_flip(plane, fb->modifier)) + if (intel_plane_can_async_flip(plane, fb->format->format, fb->modifier)) return 256 * 1024; /* FIXME undocumented so not sure what's actually needed */ @@ -852,7 +852,7 @@ static unsigned int g4x_primary_min_alignment(struct intel_plane *plane, { struct intel_display *display = to_intel_display(plane); - if (intel_plane_can_async_flip(plane, fb->modifier)) + if (intel_plane_can_async_flip(plane, fb->format->format, fb->modifier)) return 256 * 1024; if (intel_scanout_needs_vtd_wa(display)) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 7276179df878658b7053fe6d8dc37b69f19625e3..1ec730047759cb22b3e0fabfd2eaddbc1bc865af 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -174,8 +174,12 @@ bool intel_plane_needs_physical(struct intel_plane *plane) DISPLAY_INFO(display)->cursor_needs_physical; } -bool intel_plane_can_async_flip(struct intel_plane *plane, u64 modifier) +bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, + u64 modifier) { + if (intel_format_info_is_yuv_semiplanar(drm_format_info(format), modifier)) + return false; + return plane->can_async_flip && plane->can_async_flip(modifier); } diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h index 6efac923dcbc757e6f68564cbef2919c920f13cb..772a12aa9c6997d77b9393f964e91f3e8747d149 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h @@ -21,7 +21,8 @@ enum plane_id; struct intel_plane * intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id); -bool intel_plane_can_async_flip(struct intel_plane *plane, u64 modifier); +bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, + u64 modifier); unsigned int intel_adjusted_rate(const struct drm_rect *src, const struct drm_rect *dst, unsigned int rate); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 103173836abf9ea3a9094d2726d3dfbc94023ea6..ac12c13331b6a6bfb49ef6eebf50b42a83470a82 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5998,22 +5998,16 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (!plane->async_flip) continue; - if (!intel_plane_can_async_flip(plane, new_plane_state->hw.fb->modifier)) { + if (!intel_plane_can_async_flip(plane, new_plane_state->hw.fb->format->format, + new_plane_state->hw.fb->modifier)) { drm_dbg_kms(display->drm, - "[PLANE:%d:%s] Modifier 0x%llx does not support async flip\n", + "[PLANE:%d:%s] pixel format %p4cc / modifier 0x%llx does not support async flip\n", plane->base.base.id, plane->base.name, + &new_plane_state->hw.fb->format->format, new_plane_state->hw.fb->modifier); return -EINVAL; } - if (intel_format_info_is_yuv_semiplanar(new_plane_state->hw.fb->format, - new_plane_state->hw.fb->modifier)) { - drm_dbg_kms(display->drm, - "[PLANE:%d:%s] Planar formats do not support async flips\n", - plane->base.base.id, plane->base.name); - return -EINVAL; - } - /* * We turn the first async flip request into a sync flip * so that we can reconfigure the plane (eg. change modifier). diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 8739195aba696d13b30e1b978c8b2bb5e188119b..8f6170a5c108a000582f3415f78bad279254d8cf 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -601,7 +601,7 @@ static u32 tgl_plane_min_alignment(struct intel_plane *plane, * Figure out what's going on here... */ if (display->platform.alderlake_p && - intel_plane_can_async_flip(plane, fb->modifier)) + intel_plane_can_async_flip(plane, fb->format->format, fb->modifier)) return mult * 16 * 1024; switch (fb->modifier) { From patchwork Fri Apr 4 05:18:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 14038146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1BD0C369A2 for ; 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X-CSE-ConnectionGUID: 0OHDi3jERpqsM2XXD5LpCQ== X-CSE-MsgGUID: wjlBkfEEQmCvgShqqbv5MQ== X-IronPort-AV: E=McAfee;i="6700,10204,11393"; a="44893410" X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="44893410" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2025 22:33:42 -0700 X-CSE-ConnectionGUID: zNoEMqs3S5WM92QA43eNuw== X-CSE-MsgGUID: x3xn1DXRTvmm2IUbG0dW0w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="126992656" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by orviesa009.jf.intel.com with ESMTP; 03 Apr 2025 22:33:38 -0700 From: Arun R Murthy Date: Fri, 04 Apr 2025 10:48:56 +0530 Subject: [PATCH RESEND v12 4/5] drm/i915/display: Add i915 hook for format_mod_supported_async MIME-Version: 1.0 Message-Id: <20250404-asyn-v12-4-9e2396596036@intel.com> References: <20250404-asyn-v12-0-9e2396596036@intel.com> In-Reply-To: <20250404-asyn-v12-0-9e2396596036@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Jani Nikula , chaitanya.kumar.borah@intel.com, ville.syrjala@intel.com, 20250219093211.4059187-1-arun.r.murthy@intel.com, 20250311085422.2573860-1-santhosh.reddy.guddati@intel.com, Arun R Murthy , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hook up the newly added plane function pointer format_mod_supported_async to populate the modifiers/formats supported by asynchronous flips. v5: Correct the if condition for modifier support check (Chaitanya) v6: Replace uint32_t/uint64_t with u32/u64 (Jani) v7: Move plannar check from intel_async_flip_check_hw() to intel_plane_format_mod_supported_async() (Ville) v8: In case of error print format/modifier (Chaitanya) v9: Exclude C8 format as its not supported by hardware v10: filter only planar formats move changes in can_async_flip to new patch (Ville) Signed-off-by: Arun R Murthy Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/i9xx_plane.c | 2 ++ drivers/gpu/drm/i915/display/intel_atomic_plane.c | 11 +++++++++++ drivers/gpu/drm/i915/display/intel_atomic_plane.h | 3 +++ drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++ 4 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index 20c47de6d8bfd1d8ddafae02ed68370df799e22b..75780fefe0ce98fe79e8bf8e118f5cf0d0b96e55 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -897,6 +897,7 @@ static const struct drm_plane_funcs i965_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = i965_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static const struct drm_plane_funcs i8xx_plane_funcs = { @@ -906,6 +907,7 @@ static const struct drm_plane_funcs i8xx_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = i8xx_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; struct intel_plane * diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 1ec730047759cb22b3e0fabfd2eaddbc1bc865af..3b9d3e1620cd882b8a7f9b4c96640e42367248bb 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -183,6 +183,17 @@ bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, return plane->can_async_flip && plane->can_async_flip(modifier); } +bool intel_plane_format_mod_supported_async(struct drm_plane *plane, + u32 format, + u64 modifier) +{ + if (!plane->funcs->format_mod_supported(plane, format, modifier)) + return false; + + return intel_plane_can_async_flip(to_intel_plane(plane), + format, modifier); +} + unsigned int intel_adjusted_rate(const struct drm_rect *src, const struct drm_rect *dst, unsigned int rate) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h index 772a12aa9c6997d77b9393f964e91f3e8747d149..317320c32285db7edf1aaa5eced3cfbad59a37ff 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h @@ -90,5 +90,8 @@ int intel_atomic_add_affected_planes(struct intel_atomic_state *state, int intel_atomic_check_planes(struct intel_atomic_state *state); u32 intel_plane_ggtt_offset(const struct intel_plane_state *plane_state); +bool intel_plane_format_mod_supported_async(struct drm_plane *plane, + u32 format, + u64 modifier); #endif /* __INTEL_ATOMIC_PLANE_H__ */ diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 8f6170a5c108a000582f3415f78bad279254d8cf..f7c3ee1f8664eea7917a531b108aeac123cb1add 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -2666,6 +2666,7 @@ static const struct drm_plane_funcs skl_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = skl_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static const struct drm_plane_funcs icl_plane_funcs = { @@ -2675,6 +2676,7 @@ static const struct drm_plane_funcs icl_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = icl_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static const struct drm_plane_funcs tgl_plane_funcs = { @@ -2684,6 +2686,7 @@ static const struct drm_plane_funcs tgl_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = tgl_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static void From patchwork Fri Apr 4 05:18:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 14038147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D572C36010 for ; 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X-CSE-ConnectionGUID: 7Hv5hViLQSySIFTQrzqAdg== X-CSE-MsgGUID: xNceAYb0RZ2vX2+mIP9RGA== X-IronPort-AV: E=McAfee;i="6700,10204,11393"; a="44893418" X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="44893418" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2025 22:33:45 -0700 X-CSE-ConnectionGUID: tQzB2ughRgKmymIFfVwXyQ== X-CSE-MsgGUID: yAPdhHjdQUyoUBPlpHhV1w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,187,1739865600"; d="scan'208";a="126992661" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by orviesa009.jf.intel.com with ESMTP; 03 Apr 2025 22:33:41 -0700 From: Arun R Murthy Date: Fri, 04 Apr 2025 10:48:57 +0530 Subject: [PATCH RESEND v12 5/5] drm/i915/display: Indexed 8bit format does not support async flip MIME-Version: 1.0 Message-Id: <20250404-asyn-v12-5-9e2396596036@intel.com> References: <20250404-asyn-v12-0-9e2396596036@intel.com> In-Reply-To: <20250404-asyn-v12-0-9e2396596036@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Jani Nikula , chaitanya.kumar.borah@intel.com, ville.syrjala@intel.com, 20250219093211.4059187-1-arun.r.murthy@intel.com, 20250311085422.2573860-1-santhosh.reddy.guddati@intel.com, Arun R Murthy , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Async flip is not supported with Indexed 8 bit format as it depends on LUT and can't be updated atomically. Note: This may change the alignment for C8 framebuffers on some platforms. Signed-off-by: Arun R Murthy Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 3b9d3e1620cd882b8a7f9b4c96640e42367248bb..1bcfa5f4fd63442b632655ccaf325a87be78fe21 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -177,7 +177,8 @@ bool intel_plane_needs_physical(struct intel_plane *plane) bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, u64 modifier) { - if (intel_format_info_is_yuv_semiplanar(drm_format_info(format), modifier)) + if (intel_format_info_is_yuv_semiplanar(drm_format_info(format), modifier) || + format == DRM_FORMAT_C8) return false; return plane->can_async_flip && plane->can_async_flip(modifier);