From patchwork Mon Mar 25 13:29:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869145 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 47CA21390 for ; Mon, 25 Mar 2019 13:36:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3469428635 for ; Mon, 25 Mar 2019 13:36:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 32B4F291D9; Mon, 25 Mar 2019 13:36:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8397528A70 for ; Mon, 25 Mar 2019 13:36:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pk2-0002jD-T4; Mon, 25 Mar 2019 13:34:18 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pk1-0002ic-Oq for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:34:17 +0000 X-Inumbo-ID: ab8d1db8-4f02-11e9-a723-0b2774eea2f5 Received: from spam1.hygon.cn (unknown [110.188.70.11]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id ab8d1db8-4f02-11e9-a723-0b2774eea2f5; Mon, 25 Mar 2019 13:34:12 +0000 (UTC) Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam1.hygon.cn with ESMTP id x2PDU3AS013582; Mon, 25 Mar 2019 21:30:03 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x2PDTwkF063631; Mon, 25 Mar 2019 21:29:58 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:30:02 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:29:51 +0800 Message-ID: <14dcae729e8d2ed9ba54565a61e027c83b9df529.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDU3AS013582 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 01/14] x86/cpu: Create Hygon Dhyana architecture support file X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add x86 architecture support for a new processor: Hygon Dhyana Family 18h. To make Hygon initialization flow more clear, carve out code from amd.c into a separate file hygon.c, and remove unnecessary code for Hygon Dhyana. To identify Hygon Dhyana CPU, add a new vendor type X86_VENDOR_HYGON for system recognition. Hygon can fully use the function early_init_amd(), so make this common function non-static and direct call it from Hygon code. As opt_cpuid_mask_l7s0_eax and opt_cpuid_mask_l7s0_ebx are used by both AMD and Hygon, so move them to common.c. Hygon Dhyana has no CPUID faulting, so directly return false in the function probe_cpuid_faulting(). Add a separate hygon_get_topology(), which calculate phys_proc_id from AcpiId[6](see reference [1]). Reference: [1] https://git.kernel.org/tip/e0ceeae708cebf22c990c3d703a4ca187dc837f5 Signed-off-by: Pu Wen --- xen/arch/x86/cpu/Makefile | 1 + xen/arch/x86/cpu/amd.c | 7 +-- xen/arch/x86/cpu/common.c | 9 ++++ xen/arch/x86/cpu/cpu.h | 4 ++ xen/arch/x86/cpu/hygon.c | 95 +++++++++++++++++++++++++++++++++++++++ xen/include/asm-x86/x86-vendors.h | 3 +- 6 files changed, 112 insertions(+), 7 deletions(-) create mode 100644 xen/arch/x86/cpu/hygon.c diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile index 34a01ca..466acc8 100644 --- a/xen/arch/x86/cpu/Makefile +++ b/xen/arch/x86/cpu/Makefile @@ -4,6 +4,7 @@ subdir-y += mtrr obj-y += amd.o obj-y += centaur.o obj-y += common.o +obj-y += hygon.o obj-y += intel.o obj-y += intel_cacheinfo.o obj-y += mwait-idle.o diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index c790416..812d54d 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -32,11 +32,6 @@ static char __initdata opt_famrev[14]; string_param("cpuid_mask_cpu", opt_famrev); -static unsigned int __initdata opt_cpuid_mask_l7s0_eax = ~0u; -integer_param("cpuid_mask_l7s0_eax", opt_cpuid_mask_l7s0_eax); -static unsigned int __initdata opt_cpuid_mask_l7s0_ebx = ~0u; -integer_param("cpuid_mask_l7s0_ebx", opt_cpuid_mask_l7s0_ebx); - static unsigned int __initdata opt_cpuid_mask_thermal_ecx = ~0u; integer_param("cpuid_mask_thermal_ecx", opt_cpuid_mask_thermal_ecx); @@ -526,7 +521,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c) : c->cpu_core_id); } -static void early_init_amd(struct cpuinfo_x86 *c) +void early_init_amd(struct cpuinfo_x86 *c) { if (c == &boot_cpu_data) amd_init_levelling(); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 53bb0a9..9fb75dd 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -36,6 +36,11 @@ integer_param("cpuid_mask_ext_ecx", opt_cpuid_mask_ext_ecx); unsigned int opt_cpuid_mask_ext_edx = ~0u; integer_param("cpuid_mask_ext_edx", opt_cpuid_mask_ext_edx); +unsigned int opt_cpuid_mask_l7s0_eax = ~0u; +integer_param("cpuid_mask_l7s0_eax", opt_cpuid_mask_l7s0_eax); +unsigned int opt_cpuid_mask_l7s0_ebx = ~0u; +integer_param("cpuid_mask_l7s0_ebx", opt_cpuid_mask_l7s0_ebx); + unsigned int __initdata expected_levelling_cap; unsigned int __read_mostly levelling_caps; @@ -116,6 +121,9 @@ bool __init probe_cpuid_faulting(void) uint64_t val; int rc; + if(boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) + return false; + if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0) raw_msr_policy.plaform_info.cpuid_faulting = val & MSR_PLATFORM_INFO_CPUID_FAULTING; @@ -710,6 +718,7 @@ void __init early_cpu_init(void) amd_init_cpu(); centaur_init_cpu(); shanghai_init_cpu(); + hygon_init_cpu(); early_cpu_detect(); } diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index 2fcb931..971077a 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -13,11 +13,15 @@ extern bool_t opt_arat; extern unsigned int opt_cpuid_mask_ecx, opt_cpuid_mask_edx; extern unsigned int opt_cpuid_mask_xsave_eax; extern unsigned int opt_cpuid_mask_ext_ecx, opt_cpuid_mask_ext_edx; +extern unsigned int opt_cpuid_mask_l7s0_eax, opt_cpuid_mask_l7s0_ebx; extern int get_model_name(struct cpuinfo_x86 *c); extern void display_cacheinfo(struct cpuinfo_x86 *c); +void early_init_amd(struct cpuinfo_x86 *c); + int intel_cpu_init(void); int amd_init_cpu(void); int centaur_init_cpu(void); int shanghai_init_cpu(void); +int hygon_init_cpu(void); diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c new file mode 100644 index 0000000..bbe13c5 --- /dev/null +++ b/xen/arch/x86/cpu/hygon.c @@ -0,0 +1,95 @@ +#include +#include +#include +#include + +#include "cpu.h" + +#define APICID_SOCKET_ID_BIT 6 + +static void hygon_get_topology(struct cpuinfo_x86 *c) +{ + u32 ebx; + + if (c->x86_max_cores <= 1) + return; + + /* Socket ID is ApicId[6] for Hygon processors. */ + c->phys_proc_id >>= APICID_SOCKET_ID_BIT; + + ebx = cpuid_ebx(0x8000001e); + c->x86_num_siblings = ((ebx >> 8) & 0x3) + 1; + c->x86_max_cores /= c->x86_num_siblings; + c->cpu_core_id = ebx & 0xff; + + if (opt_cpu_info) + printk("CPU %d(%d) -> Processor %d, Core %d\n", + smp_processor_id(), c->x86_max_cores, + c->phys_proc_id, c->cpu_core_id); +} + +static void early_init_hygon(struct cpuinfo_x86 *c) +{ + early_init_amd(c); +} + +static void init_hygon(struct cpuinfo_x86 *c) +{ + u32 l, h; + unsigned long long value; + + /* Attempt to set LFENCE to be Dispatch Serialising. */ + if (rdmsr_safe(MSR_AMD64_DE_CFG, value)) + /* Unable to read. Assume the safer default. */ + __clear_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); + if (value & AMD64_DE_CFG_LFENCE_SERIALISE) + /* Dispatch Serialising. */ + __set_bit(X86_FEATURE_LFENCE_DISPATCH, c->x86_capability); + + /* + * If the user has explicitly chosen to disable Memory Disambiguation + * to mitigiate Speculative Store Bypass, poke the appropriate MSR. + */ + if (opt_ssbd && !rdmsr_safe(MSR_AMD64_LS_CFG, value)) { + value |= 1ull << 10; + wrmsr_safe(MSR_AMD64_LS_CFG, value); + } + + display_cacheinfo(c); + + if (cpu_has(c, X86_FEATURE_ITSC)) { + __set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); + __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability); + __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability); + } + + c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1; + + hygon_get_topology(c); + + /* Hygon CPUs do not support SYSENTER outside of legacy mode. */ + __clear_bit(X86_FEATURE_SEP, c->x86_capability); + + /* Hygon processors have APIC timer running in deep C states. */ + if (opt_arat) + __set_bit(X86_FEATURE_ARAT, c->x86_capability); + + if (cpu_has(c, X86_FEATURE_EFRO)) { + rdmsr(MSR_K7_HWCR, l, h); + l |= (1 << 27); /* Enable read-only APERF/MPERF bit */ + wrmsr(MSR_K7_HWCR, l, h); + } +} + +static const struct cpu_dev hygon_cpu_dev = { + .c_vendor = "Hygon", + .c_ident = { "HygonGenuine" }, + .c_early_init = early_init_hygon, + .c_init = init_hygon, +}; + +int __init hygon_init_cpu(void) +{ + cpu_devs[X86_VENDOR_HYGON] = &hygon_cpu_dev; + return 0; +} diff --git a/xen/include/asm-x86/x86-vendors.h b/xen/include/asm-x86/x86-vendors.h index 38a81c3..fa1cbb4 100644 --- a/xen/include/asm-x86/x86-vendors.h +++ b/xen/include/asm-x86/x86-vendors.h @@ -9,6 +9,7 @@ #define X86_VENDOR_AMD 2 #define X86_VENDOR_CENTAUR 3 #define X86_VENDOR_SHANGHAI 4 -#define X86_VENDOR_NUM 5 +#define X86_VENDOR_HYGON 5 +#define X86_VENDOR_NUM 6 #endif /* __XEN_X86_VENDORS_H__ */ From patchwork Mon Mar 25 13:30:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869141 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E0AB31390 for ; Mon, 25 Mar 2019 13:35:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE31E284B1 for ; Mon, 25 Mar 2019 13:35:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CC7E928763; Mon, 25 Mar 2019 13:35:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C8031286A7 for ; Mon, 25 Mar 2019 13:35:58 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pjt-0002hB-62; Mon, 25 Mar 2019 13:34:09 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pjs-0002h1-4y for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:34:08 +0000 X-Inumbo-ID: a7d9cc6f-4f02-11e9-bc90-bc764e045a96 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id a7d9cc6f-4f02-11e9-bc90-bc764e045a96; Mon, 25 Mar 2019 13:34:05 +0000 (UTC) Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam2.hygon.cn with ESMTP id x2PDUC98015577; Mon, 25 Mar 2019 21:30:12 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x2PDU993064072; Mon, 25 Mar 2019 21:30:09 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:30:12 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:30:05 +0800 Message-ID: <96b4704ee96795f524663fd8671a8bfef9d8baa1.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2PDUC98015577 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 02/14] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The Hygon Dhyana CPU supports the MSR way to get TOP_MEM2. So add Hygon Dhyana support to print the value of TOP_MEM2. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/cpu/mtrr/generic.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c index 8f9cf1b..94ee7d6 100644 --- a/xen/arch/x86/cpu/mtrr/generic.c +++ b/xen/arch/x86/cpu/mtrr/generic.c @@ -217,8 +217,9 @@ static void __init print_mtrr_state(const char *level) printk("%s %u disabled\n", level, i); } - if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD - && boot_cpu_data.x86 >= 0xf) { + if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD && + boot_cpu_data.x86 >= 0xf) || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) { uint64_t syscfg, tom2; rdmsrl(MSR_K8_SYSCFG, syscfg); From patchwork Mon Mar 25 13:30:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C26F1390 for ; Mon, 25 Mar 2019 13:42:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5876529357 for ; Mon, 25 Mar 2019 13:42:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 56B802935D; Mon, 25 Mar 2019 13:42:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D566529434 for ; Mon, 25 Mar 2019 13:42:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Ppa-0004Mx-Eu; Mon, 25 Mar 2019 13:40:02 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Ppa-0004Ka-0Q for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:40:02 +0000 X-Inumbo-ID: 7afed567-4f03-11e9-bc90-bc764e045a96 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 7afed567-4f03-11e9-bc90-bc764e045a96; Mon, 25 Mar 2019 13:40:00 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam2.hygon.cn with ESMTP id x2PDUP9j015617; Mon, 25 Mar 2019 21:30:25 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDUH5m001756; Mon, 25 Mar 2019 21:30:18 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:30:22 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:30:15 +0800 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2PDUP9j015617 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 03/14] x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Wei Liu , Suravee Suthikulpanit , Pu Wen , Jan Beulich , Andrew Cooper , Boris Ostrovsky , Brian Woods , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP As Hygon Dhyana CPU share similar PMU architecture with AMD family 17h one, so add Hygon Dhyana support in vpmu_arch_initialise() and vpmu_init() by sharing AMD code path. Split the common part in amd_vpmu_init() to a static function _vpmu_init(), making AMD and Hygon to call the shared function to initialize vPMU. As current vPMU still not support Zen(family 17h), add 0x17 support to amd_vpmu_init(). Also create a function hygon_vpmu_init() for Hygon vPMU initialization. Both of AMD 17h and Hygon 18h have the same performance event select and counter MSRs as AMD 15h has, so reuse the 15h definitions for them. Signed-off-by: Pu Wen --- xen/arch/x86/cpu/vpmu.c | 5 ++++ xen/arch/x86/cpu/vpmu_amd.c | 57 ++++++++++++++++++++++++++++++++------------- xen/include/asm-x86/vpmu.h | 1 + 3 files changed, 47 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/cpu/vpmu.c b/xen/arch/x86/cpu/vpmu.c index 8f6daf1..93a27d8 100644 --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -456,6 +456,7 @@ static int vpmu_arch_initialise(struct vcpu *v) switch ( vendor ) { case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: ret = svm_vpmu_initialise(v); break; @@ -876,6 +877,10 @@ static int __init vpmu_init(void) if ( amd_vpmu_init() ) vpmu_mode = XENPMU_MODE_OFF; break; + case X86_VENDOR_HYGON: + if ( hygon_vpmu_init() ) + vpmu_mode = XENPMU_MODE_OFF; + break; case X86_VENDOR_INTEL: if ( core2_vpmu_init() ) vpmu_mode = XENPMU_MODE_OFF; diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c index 5efc39b..3fc955f 100644 --- a/xen/arch/x86/cpu/vpmu_amd.c +++ b/xen/arch/x86/cpu/vpmu_amd.c @@ -538,13 +538,37 @@ int svm_vpmu_initialise(struct vcpu *v) return 0; } -int __init amd_vpmu_init(void) +static int _vpmu_init(void) { unsigned int i; + if ( sizeof(struct xen_pmu_data) + + 2 * sizeof(uint64_t) * num_counters > PAGE_SIZE ) + { + printk(XENLOG_WARNING + "VPMU: Register bank does not fit into VPMU shared page\n"); + counters = ctrls = NULL; + num_counters = 0; + return -ENOSPC; + } + + for ( i = 0; i < num_counters; i++ ) + { + rdmsrl(ctrls[i], ctrl_rsvd[i]); + ctrl_rsvd[i] &= CTRL_RSVD_MASK; + } + + regs_sz = 2 * sizeof(uint64_t) * num_counters; + + return 0; +} + +int __init amd_vpmu_init(void) +{ switch ( current_cpu_data.x86 ) { case 0x15: + case 0x17: num_counters = F15H_NUM_COUNTERS; counters = AMD_F15H_COUNTERS; ctrls = AMD_F15H_CTRLS; @@ -565,24 +589,25 @@ int __init amd_vpmu_init(void) return -EINVAL; } - if ( sizeof(struct xen_pmu_data) + - 2 * sizeof(uint64_t) * num_counters > PAGE_SIZE ) - { - printk(XENLOG_WARNING - "VPMU: Register bank does not fit into VPMU shared page\n"); - counters = ctrls = NULL; - num_counters = 0; - return -ENOSPC; - } + return _vpmu_init(); +} - for ( i = 0; i < num_counters; i++ ) +int __init hygon_vpmu_init(void) +{ + switch ( current_cpu_data.x86 ) { - rdmsrl(ctrls[i], ctrl_rsvd[i]); - ctrl_rsvd[i] &= CTRL_RSVD_MASK; + case 0x18: + num_counters = F15H_NUM_COUNTERS; + counters = AMD_F15H_COUNTERS; + ctrls = AMD_F15H_CTRLS; + k7_counters_mirrored = 1; + break; + default: + printk(XENLOG_WARNING "VPMU: Unsupported CPU family %#x\n", + current_cpu_data.x86); + return -EINVAL; } - regs_sz = 2 * sizeof(uint64_t) * num_counters; - - return 0; + return _vpmu_init(); } diff --git a/xen/include/asm-x86/vpmu.h b/xen/include/asm-x86/vpmu.h index 1287b9f..55f85ba 100644 --- a/xen/include/asm-x86/vpmu.h +++ b/xen/include/asm-x86/vpmu.h @@ -52,6 +52,7 @@ struct arch_vpmu_ops { int core2_vpmu_init(void); int vmx_vpmu_initialise(struct vcpu *); int amd_vpmu_init(void); +int hygon_vpmu_init(void); int svm_vpmu_initialise(struct vcpu *); struct vpmu_struct { From patchwork Mon Mar 25 13:30:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869149 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5BFF4139A for ; Mon, 25 Mar 2019 13:36:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 483EC28639 for ; Mon, 25 Mar 2019 13:36:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 45DFE286CF; Mon, 25 Mar 2019 13:36:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C0CDC2935E for ; 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Mon, 25 Mar 2019 21:30:32 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:30:24 +0800 Message-ID: <995b9a7dab436897c78f89b55ae982c622d57b47.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDUWqP013644 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 04/14] x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The machine check architecture for Hygon Dhyana CPU is similar to the AMD family 17h one. Add vendor checking for Hygon Dhyana to share the code path of AMD family 17h. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/cpu/common.c | 3 ++- xen/arch/x86/cpu/mcheck/amd_nonfatal.c | 5 +++-- xen/arch/x86/cpu/mcheck/mce.c | 6 ++++-- xen/arch/x86/cpu/mcheck/mce_amd.c | 5 ++++- xen/arch/x86/cpu/mcheck/non-fatal.c | 3 ++- xen/arch/x86/cpu/mcheck/vmce.c | 2 ++ 6 files changed, 17 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 9fb75dd..3f70415 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -353,7 +353,8 @@ static void __init early_cpu_detect(void) hap_paddr_bits = PADDR_BITS; } - if (c->x86_vendor != X86_VENDOR_AMD) + if (c->x86_vendor != X86_VENDOR_AMD && + c->x86_vendor != X86_VENDOR_HYGON) park_offline_cpus = opt_mce; initialize_cpu_data(0); diff --git a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c index 222f539..589dac5 100644 --- a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c +++ b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c @@ -203,10 +203,11 @@ static void mce_amd_work_fn(void *data) void __init amd_nonfatal_mcheck_init(struct cpuinfo_x86 *c) { - if (c->x86_vendor != X86_VENDOR_AMD) + if (c->x86_vendor != X86_VENDOR_AMD && + c->x86_vendor != X86_VENDOR_HYGON) return; - /* Assume we are on K8 or newer AMD CPU here */ + /* Assume we are on K8 or newer AMD or Hygon CPU here */ /* The threshold bitfields in MSR_IA32_MC4_MISC has * been introduced along with the SVME feature bit. */ diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 30cdb06..0798dea 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -778,6 +778,7 @@ void mcheck_init(struct cpuinfo_x86 *c, bool bsp) switch ( c->x86_vendor ) { case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: inited = amd_mcheck_init(c); break; @@ -1172,10 +1173,11 @@ static bool x86_mc_msrinject_verify(struct xen_mc_msrinject *mci) /* MSRs that the HV will take care of */ case MSR_K8_HWCR: - if ( c->x86_vendor == X86_VENDOR_AMD ) + if ( c->x86_vendor == X86_VENDOR_AMD || + c->x86_vendor == X86_VENDOR_HYGON ) reason = "HV will operate HWCR"; else - reason = "only supported on AMD"; + reason = "only supported on AMD or Hygon"; break; default: diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c index ed29fcc..8ed2b17 100644 --- a/xen/arch/x86/cpu/mcheck/mce_amd.c +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c @@ -286,7 +286,10 @@ enum mcheck_type amd_mcheck_init(struct cpuinfo_x86 *ci) { uint32_t i; - enum mcequirk_amd_flags quirkflag = mcequirk_lookup_amd_quirkdata(ci); + enum mcequirk_amd_flags quirkflag = 0; + + if (ci->x86_vendor != X86_VENDOR_HYGON) + quirkflag = mcequirk_lookup_amd_quirkdata(ci); /* Assume that machine check support is available. * The minimum provided support is at least the K8. */ diff --git a/xen/arch/x86/cpu/mcheck/non-fatal.c b/xen/arch/x86/cpu/mcheck/non-fatal.c index d12e8f2..77be418 100644 --- a/xen/arch/x86/cpu/mcheck/non-fatal.c +++ b/xen/arch/x86/cpu/mcheck/non-fatal.c @@ -101,7 +101,8 @@ static int __init init_nonfatal_mce_checker(void) */ switch (c->x86_vendor) { case X86_VENDOR_AMD: - /* Assume we are on K8 or newer AMD CPU here */ + case X86_VENDOR_HYGON: + /* Assume we are on K8 or newer AMD or Hygon CPU here */ amd_nonfatal_mcheck_init(c); break; diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index f15835e..4f5de07 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -154,6 +154,7 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) break; case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: ret = vmce_amd_rdmsr(v, msr, val); break; @@ -284,6 +285,7 @@ static int bank_mce_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) break; case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: ret = vmce_amd_wrmsr(v, msr, val); break; From patchwork Mon Mar 25 13:30:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869143 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D4C51390 for ; Mon, 25 Mar 2019 13:36:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8983B2860B for ; Mon, 25 Mar 2019 13:36:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8781F29354; Mon, 25 Mar 2019 13:36:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 35AD02860B for ; Mon, 25 Mar 2019 13:36:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pk2-0002iv-Hi; Mon, 25 Mar 2019 13:34:18 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pk1-0002iV-GH for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:34:17 +0000 X-Inumbo-ID: ab614eae-4f02-11e9-91b6-3fb094fa4750 Received: from spam1.hygon.cn (unknown [110.188.70.11]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id ab614eae-4f02-11e9-91b6-3fb094fa4750; Mon, 25 Mar 2019 13:34:11 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam1.hygon.cn with ESMTP id x2PDUjvP013662; Mon, 25 Mar 2019 21:30:45 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDUdOl001777; Mon, 25 Mar 2019 21:30:40 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:30:44 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:30:35 +0800 Message-ID: <61342ea12a448e2bc0f340643ff4c802399f155e.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDUjvP013662 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 05/14] x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The Hygon Dhyana CPU has the same speculative execution as AMD family 17h, so share AMD Retpoline and PTI mitigation code with Hygon Dhyana. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/spec_ctrl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 1171c02..1cd7903 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -306,7 +306,8 @@ static bool __init retpoline_safe(uint64_t caps) { unsigned int ucode_rev = this_cpu(ucode_cpu_info).cpu_sig.rev; - if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ) return true; if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || @@ -632,7 +633,8 @@ int8_t __read_mostly opt_xpti_domu = -1; static __init void xpti_init_default(uint64_t caps) { - if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ) caps = ARCH_CAPS_RDCL_NO; if ( caps & ARCH_CAPS_RDCL_NO ) From patchwork Mon Mar 25 13:30:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869151 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 876121390 for ; Mon, 25 Mar 2019 13:36:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7534928660 for ; Mon, 25 Mar 2019 13:36:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 69437286DD; Mon, 25 Mar 2019 13:36:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 22B8D286CF for ; Mon, 25 Mar 2019 13:36:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pko-00033n-3k; Mon, 25 Mar 2019 13:35:06 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pkn-00033Y-9m for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:35:05 +0000 X-Inumbo-ID: ca33e9e5-4f02-11e9-bc90-bc764e045a96 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id ca33e9e5-4f02-11e9-bc90-bc764e045a96; Mon, 25 Mar 2019 13:35:03 +0000 (UTC) Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam2.hygon.cn with ESMTP id x2PDUvJd015642; Mon, 25 Mar 2019 21:30:57 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x2PDUqUe064115; Mon, 25 Mar 2019 21:30:52 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:30:55 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:30:47 +0800 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2PDUvJd015642 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 06/14] x86/apic: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add Hygon Dhyana support to use modern APIC. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/apic.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index 2a24326..004d685 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -92,6 +92,11 @@ static int modern_apic(void) if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && boot_cpu_data.x86 >= 0xf) return 1; + + /* Hygon systems use modern APIC */ + if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) + return 1; + lvr = apic_read(APIC_LVR); version = GET_APIC_VERSION(lvr); return version >= 0x14; From patchwork Mon Mar 25 13:30:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869147 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8A3A61390 for ; Mon, 25 Mar 2019 13:36:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7832A2860B for ; Mon, 25 Mar 2019 13:36:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7656B28635; Mon, 25 Mar 2019 13:36:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1697E2860B for ; Mon, 25 Mar 2019 13:36:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8PkS-0002vo-Ow; Mon, 25 Mar 2019 13:34:44 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8PkR-0002vX-M8 for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:34:43 +0000 X-Inumbo-ID: bb23cf4c-4f02-11e9-a94a-ef068bdaa171 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id bb23cf4c-4f02-11e9-a94a-ef068bdaa171; Mon, 25 Mar 2019 13:34:37 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam2.hygon.cn with ESMTP id x2PDV5FD015724; Mon, 25 Mar 2019 21:31:05 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDV02K001792; Mon, 25 Mar 2019 21:31:00 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:31:04 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:30:57 +0800 Message-ID: <02d4ff1221a5d45aa62548f9c32081946e977a71.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2PDV5FD015724 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 07/14] x86/acpi: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add Hygon Dhyana support to the acpi cpufreq and cpuidle subsystems by using the code path of AMD. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/acpi/cpu_idle.c | 3 ++- xen/arch/x86/acpi/cpufreq/cpufreq.c | 8 +++++--- xen/arch/x86/acpi/cpufreq/powernow.c | 3 ++- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c index 654de24..02e4873 100644 --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -796,7 +796,8 @@ void acpi_dead_idle(void) __mwait(cx->address, 0); } } - else if ( current_cpu_data.x86_vendor == X86_VENDOR_AMD && + else if ( (current_cpu_data.x86_vendor == X86_VENDOR_AMD || + current_cpu_data.x86_vendor == X86_VENDOR_HYGON) && cx->entry_method == ACPI_CSTATE_EM_SYSIO ) { /* Intel prefers not to use SYSIO */ diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c index 844ab85..14c18bd 100644 --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c @@ -649,7 +649,8 @@ static int __init cpufreq_driver_init(void) (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)) ret = cpufreq_register_driver(&acpi_cpufreq_driver); else if ((cpufreq_controller == FREQCTL_xen) && - (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)) + (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)) ret = powernow_register_driver(); return ret; @@ -660,9 +661,10 @@ int cpufreq_cpu_init(unsigned int cpuid) { int ret; - /* Currently we only handle Intel and AMD processor */ + /* Currently we only handle Intel, AMD and Hygon processor */ if ( (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) || - (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) ) + (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) || + (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ) ) ret = cpufreq_add_cpu(cpuid); else ret = -EFAULT; diff --git a/xen/arch/x86/acpi/cpufreq/powernow.c b/xen/arch/x86/acpi/cpufreq/powernow.c index 025b37d..f245908 100644 --- a/xen/arch/x86/acpi/cpufreq/powernow.c +++ b/xen/arch/x86/acpi/cpufreq/powernow.c @@ -360,7 +360,8 @@ unsigned int __init powernow_register_driver() for_each_online_cpu(i) { struct cpuinfo_x86 *c = &cpu_data[i]; - if (c->x86_vendor != X86_VENDOR_AMD) + if (c->x86_vendor != X86_VENDOR_AMD && + c->x86_vendor != X86_VENDOR_HYGON) ret = -ENODEV; else { From patchwork Mon Mar 25 13:31:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869153 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2AD6C1390 for ; Mon, 25 Mar 2019 13:37:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1887028639 for ; Mon, 25 Mar 2019 13:37:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 16FD1286B5; Mon, 25 Mar 2019 13:37:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BB73328660 for ; Mon, 25 Mar 2019 13:37:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pl3-0003BH-Rq; Mon, 25 Mar 2019 13:35:21 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pl2-0003Am-TP for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:35:20 +0000 X-Inumbo-ID: cff13702-4f02-11e9-a75b-031678577f14 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id cff13702-4f02-11e9-a75b-031678577f14; Mon, 25 Mar 2019 13:35:16 +0000 (UTC) Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam2.hygon.cn with ESMTP id x2PDVHN9015739; Mon, 25 Mar 2019 21:31:17 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x2PDV93g064133; Mon, 25 Mar 2019 21:31:09 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:31:13 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:31:07 +0800 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2PDVHN9015739 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 08/14] x86/iommu: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The IOMMU architecture for the Hygon Dhyana CPU is similar to the AMD family 17h one. So add Hygon Dhyana support to it by sharing the code path of AMD. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/include/asm-x86/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/include/asm-x86/iommu.h b/xen/include/asm-x86/iommu.h index 8dc3924..699a8f7 100644 --- a/xen/include/asm-x86/iommu.h +++ b/xen/include/asm-x86/iommu.h @@ -74,6 +74,7 @@ static inline int iommu_hardware_setup(void) case X86_VENDOR_INTEL: return intel_vtd_setup(); case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: return amd_iov_detect(); } From patchwork Mon Mar 25 13:31:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869157 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 01C341390 for ; Mon, 25 Mar 2019 13:37:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E301028635 for ; Mon, 25 Mar 2019 13:37:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D669C286B5; Mon, 25 Mar 2019 13:37:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 65CD028635 for ; Mon, 25 Mar 2019 13:37:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pl6-0003Cc-7z; Mon, 25 Mar 2019 13:35:24 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pl5-0003Bz-6U for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:35:23 +0000 X-Inumbo-ID: d25ad782-4f02-11e9-84c9-5f99299f0107 Received: from spam1.hygon.cn (unknown [110.188.70.11]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id d25ad782-4f02-11e9-84c9-5f99299f0107; Mon, 25 Mar 2019 13:35:17 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam1.hygon.cn with ESMTP id x2PDVZUj013789; Mon, 25 Mar 2019 21:31:35 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDVRtV001811; Mon, 25 Mar 2019 21:31:27 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:31:31 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:31:23 +0800 Message-ID: <5e8d23e753bf24267c4f41729a2507a54c71c131.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDVZUj013789 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 09/14] x86/pv: Add Hygon Dhyana support to emulate MSRs access X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The Hygon Dhyana CPU supports lots of MSRs(such as perf event select and counter MSRs, hardware configuration MSR, MMIO configuration base address MSR, MPERF/APERF MSRs) as AMD CPU does, so add Hygon Dhyana support to the PV emulation infrastructure by using the code path of AMD. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/pv/emul-priv-op.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 3746e2a..c92f9dc 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -924,7 +924,9 @@ static int read_msr(unsigned int reg, uint64_t *val, /* fall through */ case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: - if ( vpmu_msr || (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) ) + if ( vpmu_msr || + (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) || + (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) ) { if ( vpmu_do_rdmsr(reg, val) ) break; @@ -1006,7 +1008,8 @@ static int write_msr(unsigned int reg, uint64_t val, case MSR_K8_PSTATE6: case MSR_K8_PSTATE7: case MSR_K8_HWCR: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) + if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD && + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON ) break; if ( likely(!is_cpufreq_controller(currd)) || wrmsr_safe(reg, val) == 0 ) @@ -1027,8 +1030,9 @@ static int write_msr(unsigned int reg, uint64_t val, break; case MSR_FAM10H_MMIO_CONF_BASE: - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD || - boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x17 ) + if ( (boot_cpu_data.x86_vendor != X86_VENDOR_AMD || + boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x17) && + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON ) break; if ( !is_hardware_domain(currd) || !is_pinned_vcpu(curr) ) return X86EMUL_OKAY; @@ -1067,7 +1071,8 @@ static int write_msr(unsigned int reg, uint64_t val, case MSR_IA32_MPERF: case MSR_IA32_APERF: if ( (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) && - (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) ) + (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) && + (boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) ) break; if ( likely(!is_cpufreq_controller(currd)) || wrmsr_safe(reg, val) == 0 ) @@ -1100,7 +1105,9 @@ static int write_msr(unsigned int reg, uint64_t val, vpmu_msr = true; case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: - if ( vpmu_msr || (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) ) + if ( vpmu_msr || + (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) || + (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) ) { if ( (vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(currd) ) From patchwork Mon Mar 25 13:31:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869159 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79B351390 for ; Mon, 25 Mar 2019 13:37:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 65F4A28639 for ; Mon, 25 Mar 2019 13:37:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A978286CF; Mon, 25 Mar 2019 13:37:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E85D628635 for ; Mon, 25 Mar 2019 13:37:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8PlH-0003Ir-Ic; Mon, 25 Mar 2019 13:35:35 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8PlG-0003IS-IQ for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:35:34 +0000 X-Inumbo-ID: daf7cd05-4f02-11e9-bc90-bc764e045a96 Received: from spam1.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id daf7cd05-4f02-11e9-bc90-bc764e045a96; Mon, 25 Mar 2019 13:35:32 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam1.hygon.cn with ESMTP id x2PDVjxH013803; Mon, 25 Mar 2019 21:31:45 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDVbC6001824; Mon, 25 Mar 2019 21:31:37 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:31:42 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:31:34 +0800 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDVjxH013803 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 10/14] x86/domain: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add Hygon Dhyana support to handle HyperTransport range. Also loading a nul selector does not clear bases and limits on Hygon CPUs, so add Hygon Dhyana support to the function preload_segment. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/dom0_build.c | 3 ++- xen/arch/x86/domain.c | 9 +++++---- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 6ebe367..6178d79 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -542,7 +542,8 @@ int __init dom0_setup_permissions(struct domain *d) paddr_to_pfn(MSI_ADDR_BASE_LO + MSI_ADDR_DEST_ID_MASK)); /* HyperTransport range. */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ) rc |= iomem_deny_access(d, paddr_to_pfn(0xfdULL << 32), paddr_to_pfn((1ULL << 40) - 1)); diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 8d579e2..eefe0fc 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1253,13 +1253,14 @@ arch_do_vcpu_op( } /* - * Loading a nul selector does not clear bases and limits on AMD CPUs. Be on - * the safe side and re-initialize both to flat segment values before loading - * a nul selector. + * Loading a nul selector does not clear bases and limits on AMD or Hygon + * CPUs. Be on the safe side and re-initialize both to flat segment values + * before loading a nul selector. */ #define preload_segment(seg, value) do { \ if ( !((value) & ~3) && \ - boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) \ + (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || \ + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) ) \ asm volatile ( "movl %k0, %%" #seg \ :: "r" (FLAT_USER_DS32) ); \ } while ( false ) From patchwork Mon Mar 25 13:31:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869155 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66994186D for ; Mon, 25 Mar 2019 13:37:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5379328635 for ; Mon, 25 Mar 2019 13:37:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 51A6D28660; Mon, 25 Mar 2019 13:37:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F1FDE28635 for ; Mon, 25 Mar 2019 13:37:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pkx-00038S-G1; Mon, 25 Mar 2019 13:35:15 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pkv-00037B-Pd for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:35:13 +0000 X-Inumbo-ID: cee68f34-4f02-11e9-bc90-bc764e045a96 Received: from spam1.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id cee68f34-4f02-11e9-bc90-bc764e045a96; Mon, 25 Mar 2019 13:35:11 +0000 (UTC) Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam1.hygon.cn with ESMTP id x2PDVqFQ013817; Mon, 25 Mar 2019 21:31:52 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x2PDVn3u064151; Mon, 25 Mar 2019 21:31:49 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:31:52 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:31:45 +0800 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDVqFQ013817 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 11/14] x86/domctl: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add Hygon Dhyana support to update cpuid info for creating PV guest. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/domctl.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 9bf2d08..19b7bdd 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -176,6 +176,7 @@ static int update_domain_cpuid_info(struct domain *d, break; case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: mask &= ((uint64_t)ecx << 32) | edx; /* @@ -220,7 +221,8 @@ static int update_domain_cpuid_info(struct domain *d, uint32_t eax = ctl->eax; uint32_t ebx = p->feat._7b0; - if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ) mask &= ((uint64_t)eax << 32) | ebx; d->arch.pv.cpuidmasks->_7ab0 = mask; @@ -281,8 +283,12 @@ static int update_domain_cpuid_info(struct domain *d, if ( cpu_has_cmp_legacy ) ecx |= cpufeat_mask(X86_FEATURE_CMP_LEGACY); - /* If not emulating AMD, clear the duplicated features in e1d. */ - if ( p->x86_vendor != X86_VENDOR_AMD ) + /* + * If not emulating AMD or Hygon, clear the duplicated features + * in e1d. + */ + if ( p->x86_vendor != X86_VENDOR_AMD && + p->x86_vendor != X86_VENDOR_HYGON ) edx &= ~CPUID_COMMON_1D_FEATURES; switch ( boot_cpu_data.x86_vendor ) @@ -292,6 +298,7 @@ static int update_domain_cpuid_info(struct domain *d, break; case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: mask &= ((uint64_t)ecx << 32) | edx; /* From patchwork Mon Mar 25 13:31:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869161 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 365651390 for ; Mon, 25 Mar 2019 13:37:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 23D81284B1 for ; Mon, 25 Mar 2019 13:37:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 15F4428649; Mon, 25 Mar 2019 13:37:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B02B1284B1 for ; Mon, 25 Mar 2019 13:37:52 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pli-0003Vq-3o; Mon, 25 Mar 2019 13:36:02 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Plh-0003VL-1w for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:36:01 +0000 X-Inumbo-ID: eba80e32-4f02-11e9-bc90-bc764e045a96 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id eba80e32-4f02-11e9-bc90-bc764e045a96; Mon, 25 Mar 2019 13:35:59 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam2.hygon.cn with ESMTP id x2PDW5IM015781; Mon, 25 Mar 2019 21:32:05 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDVxn7001839; Mon, 25 Mar 2019 21:31:59 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:32:03 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:31:55 +0800 Message-ID: <48dc73b7ece7e33785b118eb1b0853eda0ff5b31.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2PDW5IM015781 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 12/14] x86/traps: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The Hygon Dhyana processor has the methold to get the last exception source IP from MSR0000_01DD. So add support for it if the boot param ler is true. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/traps.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 05ddc39..97bf9e2 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1973,6 +1973,9 @@ static unsigned int calc_ler_msr(void) return MSR_IA32_LASTINTFROMIP; } break; + + case X86_VENDOR_HYGON: + return MSR_IA32_LASTINTFROMIP; } return 0; From patchwork Mon Mar 25 13:32:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869163 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3E0C1139A for ; Mon, 25 Mar 2019 13:37:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C1AF28639 for ; Mon, 25 Mar 2019 13:37:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 20C61286B5; Mon, 25 Mar 2019 13:37:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BE11D28639 for ; Mon, 25 Mar 2019 13:37:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pll-0003Xg-Fe; Mon, 25 Mar 2019 13:36:05 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Plj-0003Wn-W3 for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:36:04 +0000 X-Inumbo-ID: eb5077c4-4f02-11e9-b3ac-1b7dedbcb52d Received: from spam1.hygon.cn (unknown [110.188.70.11]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id eb5077c4-4f02-11e9-b3ac-1b7dedbcb52d; Mon, 25 Mar 2019 13:35:59 +0000 (UTC) Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam1.hygon.cn with ESMTP id x2PDWR1v013856; Mon, 25 Mar 2019 21:32:27 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x2PDWL22064260; Mon, 25 Mar 2019 21:32:21 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:32:25 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:32:10 +0800 Message-ID: <34a138abf9f21093f2b11d9958ad47c91a8d07de.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDWR1v013856 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 13/14] x86/cpuid: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Jan Beulich , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The Hygon Dhyana family 18h processor shares the same cpuid leaves as the AMD family 17h one. So add Hygon Dhyana support to caculate the cpuid policies as the AMD CPU does. Signed-off-by: Pu Wen Acked-by: Jan Beulich --- xen/arch/x86/cpuid.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index ab0aab6..f760594 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -240,6 +240,7 @@ static void recalculate_misc(struct cpuid_policy *p) break; case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: zero_leaves(p->basic.raw, 0x2, 0x3); memset(p->cache.raw, 0, sizeof(p->cache.raw)); zero_leaves(p->basic.raw, 0x9, 0xa); @@ -390,7 +391,8 @@ static void __init calculate_hvm_max_policy(void) * long mode (and init_amd() has cleared it out of host capabilities), but * HVM guests are able if running in protected mode. */ - if ( (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && + if ( (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) && raw_cpuid_policy.basic.sep ) __set_bit(X86_FEATURE_SEP, hvm_featureset); @@ -465,7 +467,8 @@ void recalculate_cpuid_policy(struct domain *d) p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, - (p->x86_vendor == X86_VENDOR_AMD + ((p->x86_vendor == X86_VENDOR_AMD || + p->x86_vendor == X86_VENDOR_HYGON) ? CPUID_GUEST_NR_EXTD_AMD : CPUID_GUEST_NR_EXTD_INTEL) - 1); @@ -507,7 +510,8 @@ void recalculate_cpuid_policy(struct domain *d) if ( is_pv_32bit_domain(d) ) { __clear_bit(X86_FEATURE_LM, max_fs); - if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) + if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD && + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON ) __clear_bit(X86_FEATURE_SYSCALL, max_fs); } From patchwork Mon Mar 25 13:32:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869169 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5DF8D139A for ; Mon, 25 Mar 2019 13:43:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 490B128111 for ; Mon, 25 Mar 2019 13:43:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3C39D285E0; Mon, 25 Mar 2019 13:43:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 12A5928111 for ; Mon, 25 Mar 2019 13:43:27 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8PrB-0004yn-9B; Mon, 25 Mar 2019 13:41:41 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8PrA-0004yD-1Q for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:41:40 +0000 X-Inumbo-ID: b63fedd5-4f03-11e9-bc90-bc764e045a96 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id b63fedd5-4f03-11e9-bc90-bc764e045a96; Mon, 25 Mar 2019 13:41:38 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam2.hygon.cn with ESMTP id x2PDWeBT015814; Mon, 25 Mar 2019 21:32:40 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDWWde001890; Mon, 25 Mar 2019 21:32:32 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:32:36 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:32:27 +0800 Message-ID: <18a86cd5e6dc0d6580eff0e5960c25b2eef21c53.1553520193.git.puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2PDWeBT015814 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 14/14] tools/libxc: Add Hygon Dhyana support X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Pu Wen , Ian Jackson , Wei Liu Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add Hygon Dhyana support to caculate the cpuid policies for creating PV or HVM guest by using the code path of AMD. Signed-off-by: Pu Wen Acked-by: Wei Liu --- tools/libxc/xc_cpuid_x86.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 098affe..d0cb9ae 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -234,6 +234,7 @@ struct cpuid_domain_info VENDOR_UNKNOWN, VENDOR_INTEL, VENDOR_AMD, + VENDOR_HYGON, } vendor; bool hvm; @@ -304,6 +305,10 @@ static int get_cpuid_domain_info(xc_interface *xch, uint32_t domid, regs[2] == 0x444d4163U && regs[3] == 0x69746e65U ) info->vendor = VENDOR_AMD; + else if ( regs[1] == 0x6f677948U && /* "HygonGenuine" */ + regs[2] == 0x656e6975U && + regs[3] == 0x6e65476eU ) + info->vendor = VENDOR_HYGON; else info->vendor = VENDOR_UNKNOWN; @@ -568,7 +573,8 @@ static void xc_cpuid_hvm_policy(const struct cpuid_domain_info *info, break; } - if ( info->vendor == VENDOR_AMD ) + if ( info->vendor == VENDOR_AMD || + info->vendor == VENDOR_HYGON ) amd_xc_cpuid_policy(info, input, regs); else intel_xc_cpuid_policy(info, input, regs); @@ -630,7 +636,8 @@ static void xc_cpuid_pv_policy(const struct cpuid_domain_info *info, case 0x80000000: { - unsigned int max = info->vendor == VENDOR_AMD + unsigned int max = (info->vendor == VENDOR_AMD|| + info->vendor == VENDOR_HYGON) ? DEF_MAX_AMDEXT : DEF_MAX_INTELEXT; if ( regs[0] > max ) @@ -736,7 +743,8 @@ static void sanitise_featureset(struct cpuid_domain_info *info) if ( !info->pv64 ) { clear_bit(X86_FEATURE_LM, info->featureset); - if ( info->vendor != VENDOR_AMD ) + if ( info->vendor != VENDOR_AMD && + info->vendor != VENDOR_HYGON ) clear_bit(X86_FEATURE_SYSCALL, info->featureset); } @@ -787,7 +795,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, input[0] = 0x80000000; cpuid(input, regs); - if ( info.vendor == VENDOR_AMD ) + if ( info.vendor == VENDOR_AMD || info.vendor == VENDOR_HYGON ) ext_max = (regs[0] <= DEF_MAX_AMDEXT) ? regs[0] : DEF_MAX_AMDEXT; else ext_max = (regs[0] <= DEF_MAX_INTELEXT) ? regs[0] : DEF_MAX_INTELEXT;