From patchwork Wed Mar 27 00:48:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Ond=C5=99ej_Jirman?= X-Patchwork-Id: 10872361 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AD1EC13B5 for ; Wed, 27 Mar 2019 00:49:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8316B27F85 for ; Wed, 27 Mar 2019 00:49:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 73A6328329; Wed, 27 Mar 2019 00:49:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.4 required=2.0 tests=BAYES_00,DKIM_ADSP_DISCARD, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B265127F85 for ; Wed, 27 Mar 2019 00:49:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=1/NJJ5lWkE4b8iTlShCofA9CrW8n9i3zN5lrmJ6r8nQ=; b=Ja+qiLss48hB4Q JLaJ3ou2jjZ07nuz82CEullP5YF8qRs/VwwuEvBYRRLI1l18iMzHsU8fS+XPl81iGc0+qhhpuVW6O SHOT5/ml6doqQZagJqXvq7mwKG9hHCwc8yYNM1g5L8f6OCkFcIVB0RvqvCcyQbz7ASLu4T0t2KhkB lpRaUSA4iltyh5yXEUPTlDpUwFjYjtu9XvqNDZ11S9pXz/UVQLs9t7y4ACnVRhUBF9Gm9KR0WNFdi F8Donyl/YGn9zg92R9dIzIukkhOLQS+Y8UOkSdFO//bIvLqBqJY+5jmTgEvuuPtj9wQKZdL3Dh8tH uz5LPE6gBSGbhaZ9PcWg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h8wkz-0007h5-V5; Wed, 27 Mar 2019 00:49:29 +0000 Received: from vps.xff.cz ([195.181.215.36]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h8wku-0007gN-ND for linux-arm-kernel@lists.infradead.org; Wed, 27 Mar 2019 00:49:27 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1553647756; bh=ouivOhArKwMC5dYfyXxes1cTnKWBXl47Y15kvFkY6uE=; h=From:To:Cc:Subject:Date:From; b=lPCj6RHHTfWpdANZhf3cEuq/HPAbUMzT8C5trqcGcCB4KS4oAaJ4NiI1S25u4Hav8 LzoiXhCXvKoI0ss0iOPr+LcmO7uL2NLWXe8w1w7y8yqqe5+JlMYPFqqfYgTHuc67C2 4KOTrPYffX0ZOQ1I60AJ4BBtgy4rsWBJ0c+r6pKA= From: megous@megous.com To: linux-sunxi@googlegroups.com Subject: [PATCH] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs Date: Wed, 27 Mar 2019 01:48:37 +0100 Message-Id: <20190327004837.10384-1-megous@megous.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190326_174925_071372_C89C195A X-CRM114-Status: UNSURE ( 9.15 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ondrej Jirman , Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Maxime Ripard , open list , Chen-Yu Tsai , Rob Herring , "moderated list:ARM/Allwinner sunXi SoC support" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ondrej Jirman This is inspired by the similar patch for H3. Original description applies, and is copied below: The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Fix other missing properties (clocks, clock-names) as well to make it all work. Signed-off-by: Ondrej Jirman --- arch/arm/boot/dts/sun8i-a83t.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index fcb7ef5ce2df..1b0b025b9250 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -69,33 +69,43 @@ cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0>; + #cooling-cells = <2>; }; cpu@1 { + clocks = <&ccu CLK_C0CPUX>; + clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; operating-points-v2 = <&cpu0_opp_table>; cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <1>; + #cooling-cells = <2>; }; cpu@2 { + clocks = <&ccu CLK_C0CPUX>; + clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; operating-points-v2 = <&cpu0_opp_table>; cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <2>; + #cooling-cells = <2>; }; cpu@3 { + clocks = <&ccu CLK_C0CPUX>; + clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; operating-points-v2 = <&cpu0_opp_table>; cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <3>; + #cooling-cells = <2>; }; cpu100: cpu@100 { @@ -107,33 +117,43 @@ cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x100>; + #cooling-cells = <2>; }; cpu@101 { + clocks = <&ccu CLK_C1CPUX>; + clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; operating-points-v2 = <&cpu1_opp_table>; cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x101>; + #cooling-cells = <2>; }; cpu@102 { + clocks = <&ccu CLK_C1CPUX>; + clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; operating-points-v2 = <&cpu1_opp_table>; cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x102>; + #cooling-cells = <2>; }; cpu@103 { + clocks = <&ccu CLK_C1CPUX>; + clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; operating-points-v2 = <&cpu1_opp_table>; cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x103>; + #cooling-cells = <2>; }; };