Toggle navigation
Patchwork
QEMU patches
Patches
Bundles
About this project
Login
Register
Mail settings
Show patches with
: Series =
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
| State =
Action Required
| Archived =
No
| 50 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Mainlined
Queued
Needs ACK
Handled Elsewhere
In Next
Search
Archived
No
Yes
Both
Delegate
------
Nobody
holtmann
holtmann
holtmann
agk
mchehab
mchehab
gregkh
gregkh
mtosatti
lethal
lethal
avi
cvaroqui
jbrassow
mikulas
dtor
bmarzins
tmlind
jmberg
jmberg
mcgrof
mcgrof
mcgrof
lenb
lenb
kyle
felipebalbi
varenet
helge
helge
khilman
khilman
khilman
khilman
jwoithe
mlin
Zhang Rui
Zhang Rui
iksaif
cjackiewicz
hmh
jbarnes
jbarnes
jbarnes
willy
snitzer
iwamatsu
dougsland
mjg59
rafael
rafael
rafael
ericvh@gmail.com
ykzhao
venkip
sandeen
pwsan
lucho@ionkov.net
rminnich
anholt
aystarik
roland
shefty
mason
glikely
krh
djbw
djbw
djbw
cmarinas
doyu
jrn
sage
tomba
mmarek
cjb
trondmy
jikos
bcousson
jic23
olof
olof
olof
nsekhar
weiny2
horms
horms
bwidawsk
bwidawsk
shemminger
eulfhan
josef
josef
josef
dianders
jpan9
hal
kdave
bleung
evalenti
jlbec
wsa
bhelgaas
vkoul
vkoul
szlin
davejiang
markgross
tagr
tiwai
vireshk
mmind
dledford
geert
geert
herbert
herbert
kvalo
kvalo
kvalo
bentiss
arend
rzwisler
stellarhopper
stellarhopper
jejb
matthias_bgg
dvhart
axboe
axboe
pcmoore
pcmoore
pcmoore
mkp
mkp
stefan_schmidt
leon
lucvoo
jsakkine
jsakkine
jsakkine
bamse
bamse
demarchi
krzk
groeck
groeck
sboyd
sboyd
mturquette
mturquette
0andriy
carlocaione
luca
dgc
kbingham
derosier
narmstrong
narmstrong
atull
tytso
tytso
djwong
bvanassche
omos
jpirko
jpirko
GustavoARSilva
pkshih
patersonc
brauner
shuahkh
shuahkh
shuahkh
palmer
palmer
jgg
Kishon
idosch
labbott
jsimmons
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
broonie
broonie
broonie
mricon
mricon
mricon
kees
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
arnd
linusw
perfinion
bbrezillon
bachradsusi
rostedt
rostedt
kholk
nbd
ebiggers
ebiggers
pavelm
sds
m0reeze
ganis
jwcart2
matttbe
andmur01
lorpie01
chanwoochoi
dlezcano
jhedberg
vudentz
robertfoss
bgix
tedd_an
tsbogend
wens
wcrobert
robher
kstewart
kwilczynski
hansg
bpf
netdev
dsa
ethtool
netdrv
martineau
abelloni
trix
pabeni
mani_sadhasivam
mlimonci
liusong6
mjp
tohojo
pmalani
prestwoj
prestwoj
dhowells
tzungbi
conchuod
paulmck
jes
mtkaczyk
colyli
cem
pateldipen1984
iweiny
iweiny
bjorn
mhiramat
JanKiszka
jaegeuk
mraynal
aring
konradybcio
ij
Hailan
jstitt007
denkenz
denkenz
mkorenbl
jjohnson
frank_li
geliang
mdraidci
mdraidci
peluse
joelgranados
Apply
Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,50/50] target/riscv: Fix vcompress with rvv_ta_all_1s
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,49/50] target/riscv/kvm: clarify how 'riscv-aia' default works
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 - -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,48/50] target/riscv/kvm: set 'aia_mode' to default in error path
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 - -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,47/50] docs/specs: add riscv-iommu
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,46/50] qtest/riscv-iommu-test: add init queues test
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,45/50] hw/riscv/riscv-iommu: add DBG support
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,44/50] hw/riscv/riscv-iommu: add ATS support
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,43/50] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,42/50] test/qtest: add riscv-iommu-pci tests
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,41/50] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,40/50] hw/riscv: add riscv-iommu-pci reference device
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,39/50] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,38/50] hw/riscv: add RISC-V IOMMU base emulation
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,37/50] hw/riscv: add riscv-iommu-bits.h
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 3 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,36/50] exec/memtxattr: add process identifier to the transaction attributes
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 3 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,35/50] target/riscv: Expose zicfiss extension as a cpu property
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,34/50] disas/riscv: enable disassembly for compressed sspush/sspopchk
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 - -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,33/50] disas/riscv: enable disassembly for zicfiss instructions
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 - -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,32/50] target/riscv: compressed encodings for sspush and sspopchk
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,31/50] target/riscv: implement zicfiss instructions
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,30/50] target/riscv: update `decode_save_opc` to store extra word2
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,29/50] target/riscv: AMO operations always raise store/AMO fault
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,28/50] target/riscv: mmu changes for zicfiss shadow stack protection
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,27/50] target/riscv: tb flag for shadow stack instructions
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,26/50] target/riscv: introduce ssp and enabling controls for zicfiss
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,25/50] target/riscv: Add zicfiss extension
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,24/50] target/riscv: Expose zicfilp extension as a cpu property
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,23/50] disas/riscv: enable `lpad` disassembly
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,22/50] target/riscv: zicfilp `lpad` impl and branch tracking
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,21/50] target/riscv: tracking indirect branches (fcfi) for zicfilp
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,20/50] target/riscv: additional code information for sw check
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,19/50] target/riscv: save and restore elp state on priv transitions
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,18/50] target/riscv: Introduce elp state and enabling controls for zicfilp
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,17/50] target/riscv: Add zicfilp extension
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,16/50] target/riscv: expose *envcfg csr and priv to qemu-user as well
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,15/50] hw/char: sifive_uart: Print uart characters async
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 1
-
-
-
2024-10-31
Alistair Francis
New
[PULL,14/50] hw/char: riscv_htif: Use blocking qemu_chr_fe_write_all
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 3 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,13/50] hw/intc/riscv_aplic: Check and update pending when write sourcecfg
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 - -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,12/50] target/riscv: Set vtype.vill on CPU reset
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,11/50] hw/intc: Don't clear pending bits on IRQ lowering
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,10/50] hw/intc: Make zeroth priority register read-only
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,09/50] tests/avocado: Boot Linux for RV32 cpu on RV64 QEMU
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
1 1 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,08/50] target/riscv: Add max32 CPU for RV64 QEMU
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,07/50] target/riscv: Enable RV32 CPU support in RV64 QEMU
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,06/50] target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,05/50] target/riscv: Detect sxl to set bit width for RV32 in RV64
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,04/50] target/riscv: Correct SXL return value for RV32 in RV64 QEMU
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,03/50] target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,02/50] target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
[PULL,01/50] target/riscv/csr.c: Fix an access to VXSAT
- 2 -
-
-
-
2024-10-31
Alistair Francis
New